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ACE24AC02A3FMUH bảng dữ liệu(PDF) 4 Page - ACE Technology Co., LTD.

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Giải thích chi tiết về linh kiện  Two-wire Serial EEPROM
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ACE24AC02A3
Two-wire Serial EEPROM
VER 1.3
4
Device Operation
A.
Serial Clock And Data Transitions
The SDA pin is typically pulled to high by an external resistor. Data is allowed to change only when
Serial clock SCL is at VIL. Any SDA signal transition may interpret as either a start or stop condition
as described below.
B.
Start Conditions
With SCL ≥ V
IH, a SDA transition from high to low is interpreted as a start condition. All valid
commands must begin with a start condition.
C.
Stop Condition
With SCL ≥ V
IH, a SDA transition from low to high is interpreted as a stop condition. All valid read or
write commands end with a stop condition. The device goes into the standby mode if it is after a read
command. A stop condition after page or byte write command will trigger the chip into the standby
mode after the self-timed internal programming finish.
D.
Acknowledge
The 2-wire protocol transmits address and data to and from the EEPROM in 8 bit words. The
EEPROM acknowledge the data or address by outputting a "0" after receiving each word. The
acknowledge signal occurs on the 9th serial clock after each word.
E.
Standby Mode
The EEPROM goes into low power standby mode after a fresh power up, after receiving a stop bit in
read mode, or after completing a self-time internal programming operation.
Figure 3: Timing diagram for start and stop conditions
Figure 4: Timing diagram for output acknowledge


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