AD9925BBCZ datasheet(3/96 Pages) AD

tên linh kiện	AD9925BBCZ

Giải thích chi tiết về linh kiện	CCD Signal Processor with Vertical Driver and Precision Timing Generator

Download	96 Pages

Scroll/Zoom	100%

nhà sản xuất	AD [Analog Devices]

Trang chủ	http://www.analog.com

Logo

3 / 96 page

AD9925

Rev. A | Page 3 of 96

SPECIFICATIONS

Table 1.

Parameter

Min

Typ

Max

Unit

TEMPERATURE RANGE

Operating

–25

+85

°C

Storage

–65

+150

°C

POWER SUPPLY VOLTAGES

AVDD (AFE Analog Supply)

2.7

3.0

3.6

V

TCVDD (Timing Core Analog Supply)

2.7

3.0

3.6

V

RGVDD (RG Driver)

2.7

3.0

3.6

V

HVDD (H1 to H4 Drivers)

2.7

3.0

3.6

V

DRVDD (Data Output Drivers)

2.7

3.0

3.6

V

DVDD (Digital)

2.7

3.0

3.6

V

V-DRIVER SUPPLY VOLTAGES

VDVDD (V-Driver Input Logic Supply)

2.7

3.0

3.6

V

VH1, VH2 (V-Driver High Supply for 3-Level Outputs)

10.5

15.0

16.0

V

VM1, VM2 (V-Driver Mid Supply for 3-Level and 2-Level Outputs)

–1.0

0.0

+3.0

V

VL1, VL2 (V-Driver Low Supply for 3-Level and 2-Level Outputs)

–10.0

–7.5

–6.0

V

POWER DISSIPATION—AFETG Section Only (see Figure 9 for Power Curves)

36 MHz, 3.0 V Supply, 100 pF Load on Each H1 to H4 Output, 20 pF RG Load

370

mW

Standby 1 Mode

10

mW

Standby 2 Mode

10

mW

Standby 3 Mode

1

mW

Power from HVDD Only1

130

mW

Power from RGVDD Only

10

mW

Power from AVDD Only

105

mW

Power from TCVDD Only

42

mW

Power from DVDD Only

57

mW

Power from DRVDD Only

26

mW

POWER DISSIPATION—V-Driver Section Only (VDVDD, VH, VL)

Normal Operation (VH = 15.0 V, VL = −7.5 V)2

60

mW

Standby 1 Mode2

70

mW

Standby 2 Mode2

70

mW

Standby 3 Mode2

110

mW

MAXIMUM CLOCK RATE (CLI)

36

MHz

2 The power dissipated by the V-driver circuitry depends on the logic states of the inputs as well as actual CCD operation; default dc values are used for each measure-

ment, in each mode of operation. Load conditions are described in the

section.

1 The total power dissipated by the HVDD supply may be approximated using the equation Total HVDD Power = [CLOAD × HVDD × Pixel Frequency] × HVDD.

Reducing the H-loading and/or using a lower HVDD supply will reduce the power dissipation. CLOAD is the total capacitance seen by all H-outputs.

Vertical Driver Specifications

Số phần tương tự - AD9925BBCZ

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Analog Devices	AD9925	1Mb / 96P	CCD Signal Processor with Vertical Driver and Precision Timing Generator REV. A

More results

Mô tả tương tự - AD9925BBCZ

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Analog Devices	AD9925	1Mb / 96P	CCD Signal Processor with Vertical Driver and Precision Timing Generator REV. A
	AD9923A	1Mb / 88P	CCD Signal Processor with V-Driver and Precision Timing??Generator REV. 0
	AD9923A	1Mb / 84P	CCD Signal Processor with V-Driver and Precision Timing Generator REV. A
	AD9937	416Kb / 44P	CCD Signal Processor with Precision Timing Generator REV. 0
	AD9929	564Kb / 64P	CCD Signal Processor with Precision Timing Generator REV. A
	AD9898	562Kb / 52P	CCD Signal Processor with Precision Timing Generator REV. 0
	AD9898	518Kb / 52P	CCD Signal Processor with Precision Timing??Generator REV. 0
	AD9937	399Kb / 44P	CCD Signal Processor with Precision Timing??Generator REV. 0
	AD9929	558Kb / 64P	CCD Signal Processor with Precision Timing Generator REV. A
	AD9920ABBCZ	1Mb / 112P	12-Bit CCD Signal Processor with V-Driver and Precision Timing Generator REV. B

More results

AD9925BBCZ bảng dữ liệu(PDF) 3 Page - Analog Devices

AD9925BBCZ bảng dữ liệu(HTML) 3 Page - Analog Devices

Số phần tương tự - AD9925BBCZ

Mô tả tương tự - AD9925BBCZ

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96

bảng dữ liệu tải về

Link URL