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AD9877 bảng dữ liệu(PDF) 1 Page - Analog Devices |
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AD9877 bảng dữ liệu(HTML) 1 Page - Analog Devices |
1 / 37 page Mixed-Signal Front End Set-Top Box, Cable Modem AD9877 Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. FEATURES Low cost 3.3 V CMOS MxFE™ for MCNS-DOCSIS-, DVB-, DAVIC-compliant set-top box and cable modem applications 232 MHz quadrature digital upconverter 12-bit direct IF DAC (TxDAC+®) Up to 65 MHz carrier frequency DDS Programmable sampling clock rates Selectable interpolation filter Analog Tx output level adjust 12-bit, 33 MSPS direct IF ADC Dual 8-bit, 16.5 MSPS sampling IQ ADCs Two 12-bit Σ-Δ auxiliary DACs Direct interface to AD8321/AD8325 or AD8322/AD8327 PGA cable driver APPLICATIONS Cable modems Set-top boxes Wireless modems FUNCTIONAL BLOCK DIAGRAM ADC 12 12 DAC 12 12 SDELTA0 SDELTA1 DDS COS SIN INTER- POLATOR FILTER Tx CONTROL FUNCTIONS Rx PLL REFCLK I IN Q IN CA Tx IF IN Tx DATA SPORT PROFILE RxIQ DATA 4 2 3 RxIF DATA ADC 8 ADC 8 Σ-Δ Σ-Δ AD9877 Figure 1. GENERAL DESCRIPTION The AD9877 is a single-supply set-top box and cable modem mixed-signal front end. The device contains a transmit path interpolation filter, complete quadrature digital upconverter, and transmit DAC. The receive path contains a 12-bit ADC and dual 8-bit ADCs. All internally required clocks and an output system clock are generated by the phase-locked loop (PLL) from a single crystal or clock input. The transmit path interpolation filter provides upsampling factors of 12× or 16× with an output signal bandwidth as high as 5.8 MHz. Carrier frequencies up to 65 MHz with 26 bits of frequency tuning resolution can be generated by the direct digital synthesizer (DDS). The transmit DAC resolution is 12 bits and can run at sampling rates as high as 232 MSPS. Analog output scaling from 0 dB to 7.5 dB in 0.5 dB steps is available to preserve SNR when reduced output levels are required. The 12-bit ADC has excellent undersampling performance, allowing it to typically deliver better than 10 ENOBs with IF inputs up to 70 MHz. The 12-bit IF ADC can sample at a rate up to 33 MHz, allowing it to process wideband signal inputs. Two programmable Σ-Δ DACs are available and can be used to control external components, such as variable gain amplifiers (VGAs) or voltage-controlled tuners. The AD9877 integrates a CA port that enables a host processor to control the AD8321/AD8325 or AD8322/AD8327 programmable gain amplifier (PGA) cable drivers via the MxFE SPORT. The AD9877 is available in a 100-lead MQFP package. It offers enhanced receive path undersampling performance and lower cost compared to the pin-compatible AD9873. The AD9877 is specified over the extended industrial (−40°C to +85°C) temperature range. |
Số phần tương tự - AD9877_17 |
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Mô tả tương tự - AD9877_17 |
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