công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
AD5251BRU10-RL7 bảng dữ liệu(PDF) 11 Page - Analog Devices |
|
AD5251BRU10-RL7 bảng dữ liệu(HTML) 11 Page - Analog Devices |
11 / 28 page AD5251/AD5252 Rev. 0 | Page 11 of 28 I2C INTERFACE DETAIL DESCRIPTION 0 WRITE S 0 1 0 1 1 A D 1 A D 0 0 A A 4 A 3 A 2 A 1 A 0 A P DATA 0 (1 BYTE + ACKNOWLEDGE) SLAVE ADDRESS INSTRUCTIONS AND ADDRESS CMD/ REG EE/ RDAC 0 REG A/ A FROM MASTER TO SLAVE FROM SLAVE TO MASTER S = START CONDITION P = STOP CONDITION A = ACKNOWLEDGE (SDA LOW) A = NOT ACKNOWLEDGE (SDA HIGH) R/W = READ ENABLE AT HIGH AND WRITE ENABLE AT LOW CMD/REG = COMMAND ENABLE BIT, LOGIC HIGH/REGISTER ACCESS BIT, LOGIC LOW EE/RDAC = EEMEM REGISTER, LOGIC HIGH/RDAC REGISTER, LOGIC LOW A4, A3, A2, A1, A0 = RDAC/EEMEM REGISTER ADDRESSES Figure 7. Single Write Mode 0 WRITE S 0 1 0 1 1 A D 1 A D 0 0 A A 4 A 3 A 2 A 1 A 0 P A A RDAC1 DATA RDAC3 DATA 0 (N BYTES + ACKNOWLEDGE) RDAC SLAVE ADDRESS RDAC INSTRUCTIONS AND ADDRESS CMD/ REG EE/ RDAC 0 REG A/ A Figure 8. Consecutive Write Mode Table 6. Addresses for Writing Data Byte Contents to RDAC Registers (R/W = 0, CMD/REG = 0, EE/RDAC = 0) A4 A3 A2 A1 A0 RDAC Data Byte Description 0 0 0 0 0 Reserved 0 0 0 0 1 RDAC1 6- or 8 bit wiper setting (2 MSBs of AD5251 are X) 0 0 0 1 0 Reserved 0 0 0 1 1 RDAC3 6- or 8 bit wiper setting (2 MSBs of AD5251 are X) 0 0 1 0 0 Reserved : : : : : 0 1 1 1 1 Reserved RDAC/EEMEM WRITE Setting the wiper position requires an RDAC write operation. The single write operation is shown in Figure 7, and the consecutive write operation is shown in Figure 8. In the consecutive write operation, if the RDAC is selected and the address starts at 00001, the first data byte goes to RDAC1 and the second data byte goes to RDAC3. The RDAC address is shown in Table 6. While the RDAC wiper setting is controlled by a specific RDAC register, each RDAC register corresponds to a specific EEMEM location, which provides nonvolatile wiper storage functionality. The addresses are shown in Table 7. The single and consecutive write operations apply also to EEMEM write operations. There are 12 nonvolatile memory locations: EEMEM4 to EEMEM15. Users can store a total of 12 bytes of information, such as memory data for other components, look-up tables, or system identification information. In a write operation to the EEMEM registers, the device disables the I2C interface during the internal write cycle. Acknowledge polling is required to determine the completion of the write cycle. See EEMEM Write-Acknowledge Polling. |
Số phần tương tự - AD5251BRU10-RL7 |
|
Mô tả tương tự - AD5251BRU10-RL7 |
|
|
Link URL |
Chính sách bảo mật |
ALLDATASHEET.VN |
Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |