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ST92F120V9 bảng dữ liệu(PDF) 8 Page - STMicroelectronics |
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ST92F120V9 bảng dữ liệu(HTML) 8 Page - STMicroelectronics |
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8 / 324 page  8/324 ST92F120 - GENERAL DESCRIPTION voltage drop across the SCR parasitic resistor, the SCR may be turned on; to turn off the SCR it is necessary to remove the power supply from the device. The present ST9 design implements layout and process solutions to decrease the effects of elec- trostatic discharges (ESD) and latchup. Of course it is not possible to test all devices, due to the de- structive nature of the mechanism; in order to guarantee product reliability, destructive tests are carried out on groups of devices, according to STMicroelectronics internal Quality Assurance standards and recommendations. 1.2.4.2 Protective Interface Although ST9 input/output circuitry has been de- signed taking ESD and Latchup problems into ac- count, for those applications and systems where ST9 pins are exposed to illegal voltages and high current injections, the user is strongly recommend- ed to implement hardware solutions which reduce the risk of damage to the microcontroller: low-pass filters and clamp diodes are usually sufficient in preventing stress conditions. The risk of having out-of-range voltages and cur- rents is greater for those signals coming from out- side the system, where noise effect or uncon- trolled spikes could occur with higher probability than for the internal signals; it must be underlined that in some cases, adoption of filters or other ded- icated interface circuitries might affect global mi- crocontroller performance, inducing undesired tim- ing delays, and impacting the global system speed. Figure 3. Digital Input/Output - Push-Pull PIN OUTPUT BUFFER P N P N N INPUT BUFFER P ESD PROTECTION CIRCUITRY PORT CIRCUITRY I/O CIRCUITRY P EN EN 1 |
Số phần tương tự - ST92F120V9 |
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Mô tả tương tự - ST92F120V9 |
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