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LM43600QPWPTQ1 bảng dữ liệu(PDF) 3 Page - Texas Instruments |
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LM43600QPWPTQ1 bảng dữ liệu(HTML) 3 Page - Texas Instruments |
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3 / 54 page  SW VIN PGND CBOOT VCC BIAS SYNC RT PGOOD EN SS/TRK AGND FB SW PGND VIN PAD 1 16 2 3 4 5 6 8 7 9 15 14 13 12 11 10 3 LM43600-Q1 www.ti.com SNVSA99C – JULY 2015 – REVISED NOVEMBER 2017 Product Folder Links: LM43600-Q1 Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated (1) P = Power, G = Ground, A = Analog 5 Pin Configuration and Functions PWP Package 16-Pin HTSSOP Top View Pin Functions PIN DESCRIPTION NAME NUMBER I/O (1) SW 1, 2 P Switching output of the regulator. Internally connected to both power MOSFETs. Connect to power inductor. CBOOT 3 P Bootstrap capacitor connection for high-side driver. Connect a high-quality 470-nF capacitor from CBOOT to SW. VCC 4 P Internal bias supply output for bypassing. Connect bypass capacitor from this pin to AGND. Do not connect external load to this pin. Never short this pin to ground during operation. BIAS 5 P Optional internal LDO supply input. To improve efficiency, it is recommended to tie to VOUT when 3.3 V ≤ VOUT ≤ 28 V, or tie to an external 3.3 V or 5 V rail if available. When used, place a bypass capacitor (1 to 10 µF) from this pin to ground. Tie to ground when not in use. Do not float SYNC 6 A Clock input to synchronize switching action to an external clock. Use proper high speed termination to prevent ringing. Connect to ground if not used. Do not float. RT 7 A Connect a resistor RT from this pin to AGND to program switching frequency. Leave floating for 500 kHz default switching frequency. PGOOD 8 A Open drain output for power-good flag. Use a 10-kΩ to 100-kΩ pullup resistor to logic rail or other DC voltage no higher than 12 V. FB 9 A Feedback sense input pin. Connect to the midpoint of feedback divider to set VOUT. Do not short this pin to ground during operation. AGND 10 G Analog ground pin. Ground reference for internal references and logic. Connect to system ground. SS/TRK 11 A Soft-start control pin. Leave floating for internal soft-start slew rate. Connect to a capacitor to extend soft start time. Connect to external voltage ramp for tracking. EN 12 A Enable input to the LM43600-Q1: High = ON and low = OFF. Connect to VIN, or to VIN through resistor divider,or to an external voltage or logic source. Do not float. VIN 13, 14 P Supply input pins to internal LDO and high side power FET. Connect to power supply and bypass capacitors CIN. Path from VIN pin to high frequency bypass CIN and PGND must be as short as possible. PGND 15, 16 G Power ground pins, connected internally to the low side power FET. Connect to system ground, PAD, AGND, ground pins of CIN and COUT. Path to CIN must be as short as possible. PAD — G Low impedance connection to AGND. Connect to PGND on PCB . Major heat dissipation path of the die. Must be used for heat sinking to ground plane on PCB. |
Số phần tương tự - LM43600QPWPTQ1 |
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Mô tả tương tự - LM43600QPWPTQ1 |
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