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ADS8598SIPMR bảng dữ liệu(PDF) 2 Page - Texas Instruments

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tên linh kiện ADS8598SIPMR
Giải thích chi tiết về linh kiện  18-Bit, 200-kSPS, 8-Channel, Simultaneous-Sampling ADC With Bipolar Inputs on a Single Supply
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ADS8598SIPMR bảng dữ liệu(HTML) 2 Page - Texas Instruments

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ADS8598S
SBAS827 – SEPTEMBER 2017
www.ti.com
Product Folder Links: ADS8598S
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
Table of Contents
1
Features .................................................................. 1
2
Applications ........................................................... 1
3
Description ............................................................. 1
4
Revision History..................................................... 2
5
Pin Configuration and Functions ......................... 3
6
Specifications......................................................... 5
6.1
Absolute Maximum Ratings ...................................... 5
6.2
ESD Ratings.............................................................. 5
6.3
Recommended Operating Conditions ....................... 6
6.4
Thermal Information .................................................. 6
6.5
Electrical Characteristics........................................... 7
6.6
Timing Requirements: CONVST Control ................ 10
6.7
Timing Requirements: Data Read Operation.......... 10
6.8
Timing Requirements: Parallel Data Read Operation,
CS and RD Tied Together ....................................... 10
6.9
Timing Requirements: Parallel Data Read Operation,
CS and RD Separate ............................................... 11
6.10
Timing Requirements: Serial Data Read
Operation ................................................................. 11
6.11
Timing Requirements: Byte Mode Data Read
Operation ................................................................. 11
6.12
Timing Requirements: Oversampling Mode.......... 11
6.13
Timing Requirements: Exit Standby Mode............ 11
6.14
Timing Requirements: Exit Shutdown Mode......... 12
6.15
Switching Characteristics: CONVST Control ........ 12
6.16
Switching Characteristics: Parallel Data Read
Operation, CS and RD Tied Together ..................... 12
6.17
Switching Characteristics: Parallel Data Read
Operation, CS and RD Separate ............................. 13
6.18
Switching Characteristics: Serial Data Read
Operation ................................................................. 13
6.19
Switching Characteristics: Byte Mode Data Read
Operation ................................................................. 14
6.20
Typical Characteristics .......................................... 18
7
Detailed Description ............................................ 25
7.1
Overview ................................................................. 25
7.2
Functional Block Diagram ....................................... 25
7.3
Feature Description................................................. 26
7.4
Device Functional Modes........................................ 35
8
Application and Implementation ........................ 48
8.1
Application Information............................................ 48
8.2
Typical Applications ................................................ 48
9
Power Supply Recommendations ...................... 53
10
Layout................................................................... 54
10.1
Layout Guidelines ................................................. 54
10.2
Layout Example .................................................... 54
11
Device and Documentation Support ................. 56
11.1
Documentation Support ........................................ 56
11.2
Receiving Notification of Documentation Updates 56
11.3
Community Resources.......................................... 56
11.4
Trademarks ........................................................... 56
11.5
Electrostatic Discharge Caution ............................ 56
11.6
Glossary ................................................................ 56
12
Mechanical, Packaging, and Orderable
Information ........................................................... 56
4 Revision History
DATE
REVISION
NOTES
September 2017
*
Initial release.


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