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1 / 62 page Low Power, 24-Bit, 31.25 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers Data Sheet AD7172-4 Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2015–2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Fast and flexible output rate: 1.25 SPS to 31.25 kSPS Channel scan data rate of 6.21 kSPS/channel (161 μs settling) Performance specifications 17.2 noise free bits at 31.25 kSPS 24 noise free bits at 5 SPS INL: ±2 ppm of FSR 85 dB rejection of 50 Hz and 60 Hz with 50 ms settling User configurable input channels 4 fully differential channels or 8 single-ended channels Crosspoint multiplexer True rail-to-rail analog and reference input buffers Internal or external clock Power supply AVDD1 = 3.0 V to 5.5 V, AVDD2 = IOVDD = 2 V to 5.5 V Split supply with AVDD1 and AVSS at ±2.5 V or ±1.65 V ADC current: 1.5 mA Temperature range: −40°C to +105°C 3- or 4-wire serial digital interface (Schmitt trigger on SCLK) Serial port interface (SPI), QSPI-, MICROWIRE-, and DSP- compatible APPLICATIONS Process control: PLC/DCS modules Temperature and pressure measurement Medical and scientific multichannel instrumentation Chromatography GENERAL DESCRIPTION The AD7172-4 is a low noise, low power, multiplexed, Σ-Δ analog- to-digital converter (ADC) with 4- or 8-channel (fully differential/ single-ended) inputs for low bandwidth signals. The AD7172-4 has a maximum channel scan rate of 6.21 kSPS (161 μs) for fully settled data. The output data rates range from 1.25 SPS to 31.25 kSPS. The AD7172-4 integrates key analog and digital signal condition- ing blocks to allow users to configure an individual setup for each analog input channel in use via the SPI. Integrated true rail-to- rail buffers on the analog inputs and reference inputs provide easy to drive high impedance inputs. The digital filter allows simultaneous 50 Hz and 60 Hz rejection at a 27.27 SPS output data rate. The user can switch between different filter options according to the demands of each channel in the application, with further digital processing functions such as offset and gain calibration registers, which are configurable on a per channel basis. General-purpose input/outputs (GPIOs) control external multiplexers synchronous to the ADC conversion timing. The specified temperature range is −40°C to +105°C. The AD7172-4 is in a 5 mm × 5 mm, 32-lead LFCSP. Note that, throughout this data sheet, the dual function pin names are referenced by the relevant function only. FUNCTIONAL BLOCK DIAGRAM AVDD1 AVDD AVSS AVSS PDSW GPIO0 GPIO1 GPO2 GPO3 XTAL1 XTAL2/CLKIO DGND REF– REF+ AVDD2 REGCAPA AIN0/REF2– AIN1/REF2+ AIN7 AIN8 Σ-∆ ADC 1.8V LDO 1.8V LDO IOVDD REGCAPD SERIAL INTERFACE AND CONTROL DIGITAL FILTER AD7172-4 XTAL AND INTERNAL CLOCK OSCILLATOR CIRCUITRY CS SCLK DIN DOUT/RDY SYNC ERROR I/O AND EXTERNAL MUX CONTROL RAIL-TO-RAIL REFERENCE INPUT BUFFERS RAIL-TO-RAIL ANALOG INPUT BUFFERS CROSSPOINT MULTIPLEXER Figure 1. |
Số phần tương tự - AD7172-4BCPZ-RL7 |
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Mô tả tương tự - AD7172-4BCPZ-RL7 |
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