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MC68HC811E2VP2 bảng dữ liệu(PDF) 9 Page - Motorola, Inc

tên linh kiện MC68HC811E2VP2
Giải thích chi tiết về linh kiện  Microcontrollers
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nhà sản xuất  MOTOROLA [Motorola, Inc]
Trang chủ  http://www.freescale.com
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Table of Contents
M68HC11E Family — Rev. 5
Data Sheet
MOTOROLA
Table of Contents
9
4.2.4
Stack Pointer (SP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
4.2.5
Program Counter (PC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
4.2.6
Condition Code Register (CCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.2.6.1
Carry/Borrow (C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.2.6.2
Overflow (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.2.6.3
Zero (Z) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.2.6.4
Negative (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.2.6.5
Interrupt Mask (I) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.2.6.6
Half Carry (H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
4.2.6.7
X Interrupt Mask (X) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
4.2.6.8
STOP Disable (S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
4.3
Data Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
4.4
Opcodes and Operands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.5
Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.5.1
Immediate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.5.2
Direct . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.5.3
Extended. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.5.4
Indexed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.5.5
Inherent. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.5.6
Relative. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.6
Instruction Set. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Section 5. Resets and Interrupts
5.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
5.2
Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
5.2.1
Power-On Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
5.2.2
External Reset (RESET). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
5.2.3
Computer Operating Properly (COP) Reset . . . . . . . . . . . . . . . . . . . 90
5.2.4
Clock Monitor Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
5.2.5
System Configuration Options Register . . . . . . . . . . . . . . . . . . . . . . 92
5.2.6
Configuration Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
5.3
Effects of Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
5.3.1
Central Processor Unit (CPU). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
5.3.2
Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
5.3.3
Timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
5.3.4
Real-Time Interrupt (RTI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
5.3.5
Pulse Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
5.3.6
Computer Operating Properly (COP) . . . . . . . . . . . . . . . . . . . . . . . . 95
5.3.7
Serial Communications Interface (SCI) . . . . . . . . . . . . . . . . . . . . . . 95
5.3.8
Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
5.3.9
Analog-to-Digital (A/D) Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
5.3.10
System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
5.4
Reset and Interrupt Priority. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
5.4.1
Highest Priority Interrupt and Miscellaneous Register . . . . . . . . . . . 97
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com


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