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X1240S8 bảng dữ liệu(PDF) 8 Page - Xicor Inc. |
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X1240S8 bảng dữ liệu(HTML) 8 Page - Xicor Inc. |
8 / 19 page X1240 8 Figure 6. Byte Write Sequence Figure 7. Writing 30 bytes to a 64-byte page starting at adress 40. Figure 8. Page Write Sequence S t a r t S t o p Slave Address Word Address 1 Data A C K A C K A C K SDA Bus Signals from the Slave Signals from the Master 0 A C K Word Address 0 1 1 1 1 0000 0 address address 40 23 bytes 63 7 bytes address = 6 address pointer ends here Addr = 7 Word Address 0 S t a r t S t o p Slave Address Word Address 1 Data (n) A C K A C K A C K SDA Bus Signals from the Slave Signals from the Master 0 Data (1) A C K (1 < n < 64) 1 1 1 10 0 0 0 0 Page Write The X1240 has a page write operation. It is initiated in the same manner as the byte write operation; but instead of terminating the write cycle after the first data byte is transferred, the master can transmit up to 63 more bytes to the memory array and up to 7 more bytes to the clock/control registers. (Note: Prior to writing to the CCR, the master must write a 02h, then 06h to the sta- tus register in two preceding operations to enable the write operation. See “Writing to the Clock/Control Reg- isters” on page 5.) After the receipt of each byte, the X1240 responds with an acknowledge, and the address is internally incremented by one. When the counter reaches the end of the page, it “rolls over” and goes back to the first address on the same page. This means that the master can write 64 bytes to a memory array page or 8 bytes to a CCR section starting at any location on that page. If the master begins writing at location 40 of the memory and loads 30 bytes, then the first 23 bytes are written to addresses 40 through 63, and the last 7 bytes are written to columns 0 through 6. Afterwards, |
Số phần tương tự - X1240S8 |
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Mô tả tương tự - X1240S8 |
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