công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

X1240 bảng dữ liệu(PDF) 5 Page - Xicor Inc.

tên linh kiện X1240
Giải thích chi tiết về linh kiện  Real Time Clock/Calendar with EEPROM
Download  19 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  XICOR [Xicor Inc.]
Trang chủ  http://www.xicor.com
Logo XICOR - Xicor Inc.

X1240 bảng dữ liệu(HTML) 5 Page - Xicor Inc.

  X1240 Datasheet HTML 1Page - Xicor Inc. X1240 Datasheet HTML 2Page - Xicor Inc. X1240 Datasheet HTML 3Page - Xicor Inc. X1240 Datasheet HTML 4Page - Xicor Inc. X1240 Datasheet HTML 5Page - Xicor Inc. X1240 Datasheet HTML 6Page - Xicor Inc. X1240 Datasheet HTML 7Page - Xicor Inc. X1240 Datasheet HTML 8Page - Xicor Inc. X1240 Datasheet HTML 9Page - Xicor Inc. Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 19 page
background image
X1240
5
RWEL: Register Write Enable Latch—Volatile
This bit is a volatile latch that powers up in the LOW
(disabled) state. The RWEL bit must be set to “1” prior
to any writes to the Clock/Control Registers. Writes to
RWEL bit do not cause a nonvolatile write cycle, so the
device is ready for the next operation immediately after
the stop condition. A write to the CCR requires both the
RWEL and WEL bits to be set in a specific sequence.
WEL: Write Enable Latch—Volatile
The WEL bit controls the access to the CCR and mem-
ory array during a write operation. This bit is a volatile
latch that powers up in the LOW (disabled) state. While
the WEL bit is LOW, writes to the CCR or any array
address will be ignored (no acknowledge will be issued
after the Data Byte). The WEL bit is set by writing a “1”
to the WEL bit and zeroes to the other bits of the Status
Register. Once set, WEL remains set until either reset
to 0 (by writing a “0” to the WEL bit and zeroes to the
other bits of the Status Register) or until the part pow-
ers up again. Writes to WEL bit do not cause a non-vol-
atile write cycle, so the device is ready for the next
operation immediately after the stop condition.
RTCF: Real Time Clock Fail Bit—Volatile
This bit is set to a ‘1’ after a total power failure. This is a
read only bit that is set by hardware when the device
powers up after having lost all power to the device. The
bit is set regardless of whether VCC or VBACK is applied
first. The loss of one or the other supplies does not
result in setting the RTCF bit. The first valid write to the
RTC (writing one byte is sufficient) resets the RTCF bit
to ‘0’.
Unused Bits:
These devices do not use bits 3 through 6, but must
have a zero in these bit positions. The Data Byte output
during a SR read will contain zeros in these bit locations.
CONTROL REGISTERS
Block Protect Bits - BP2, BP1, BP0 - (Nonvolatile)
The Block Protect Bits, BP2, BP1 and BP0, determine
which blocks of the array are write protected. A write to
a protected block of memory is ignored. The block pro-
tect bits will prevent write operations to one of eight
segments of the array. The partitions are described in
Table 3.
Table 3. Block Protect Bits
WRITING TO THE CLOCK/CONTROL REGISTERS
Changing any of the nonvolatile bits of the clock/control
register requires the following steps:
—Write a 02H to the Status Register to set the Write
Enable Latch (WEL). This is a volatile operation, so
there is no delay after the write. (Operation pre-
ceeded by a start and ended with a stop).
—Write a 06H to the Status Register to set both the
Register Write Enable Latch (RWEL) and the WEL
bit. This is also a volatile cycle. The zeros in the data
byte are required. (Operation preceeded by a start
and ended with a stop).
—Write one to 8 bytes to the Clock/Control Registers
with the desired clock, or control data. This sequence
starts with a start bit, requires a slave byte of
“11011110” and an address within the CCR and is
terminated by a stop bit. A write to the CCR changes
EEPROM values so these initiate a nonvolatile write
cycle and will take up to 10ms to complete. Writes to
undefined areas have no effect. The RWEL bit is
reset by the completion of a nonvolatile write write
cycle, so the sequence must be repeated to again ini-
tiate another change to the CCR contents. If the
sequence is not completed for any reason (by send-
ing an incorrect number of bits or sending a start
instead of a stop, for example) the RWEL bit is not
reset and the device remains in an active mode.
—Writing all zeros to the status register resets both the
WEL and RWEL bits.
—A read operation occurring between any of the previ-
ous operations will not interrupt the register write
operation.
—The RWEL and WEL bits can be reset by writing a 0
to the Status Register.
Protected Addresses
X1240
Array Lock
0
0
0
None
None
0
0
1
600h - 7FFh
Upper 1/4
0
1
0
400h - 7FFh
Upper 1/2
0
1
1
000h - 7FFh
Full Array
1
0
0
000h - 03Fh
First Page
1
0
1
000h - 07Fh
First 2 pgs
1
1
0
000h - 0FFh
First 4 pgs
1
1
1
000h - 1FFh
First 8 Pgs


Số phần tương tự - X1240

nhà sản xuấttên linh kiệnbảng dữ liệuGiải thích chi tiết về linh kiện
logo
Xicor Inc.
X1243 XICOR-X1243 Datasheet
90Kb / 18P
   Real Time Clock/Calendar/Alarm with EEPROM
logo
Intersil Corporation
X1243 INTERSIL-X1243 Datasheet
293Kb / 17P
   Real Time Clock/Calendar/Alarm with EEPROM
logo
Renesas Technology Corp
X1243 RENESAS-X1243 Datasheet
713Kb / 17P
   16K (2K x 8), 2-Wire RTC Real Time Clock/Calendar/Alarm with EEPROM
April 28, 2005
logo
Texas Instruments
X1243BIGABL TI1-X1243BIGABL Datasheet
864Kb / 48P
[Old version datasheet]   Single-Chip 77- and 79-GHz FMCW Transceiver
X1243BIGABL TI1-X1243BIGABL Datasheet
864Kb / 49P
[Old version datasheet]   Single-Chip 77- and 79-GHz FMCW Transceiver
More results

Mô tả tương tự - X1240

nhà sản xuấttên linh kiệnbảng dữ liệuGiải thích chi tiết về linh kiện
logo
Intersil Corporation
ISL12027 INTERSIL-ISL12027_10 Datasheet
390Kb / 28P
   Real Time Clock/Calendar with EEPROM
ISL12027 INTERSIL-ISL12027 Datasheet
414Kb / 28P
   Real Time Clock/Calendar with EEPROM
logo
Renesas Technology Corp
ISL12027 RENESAS-ISL12027 Datasheet
1Mb / 29P
   Real Time Clock/Calendar with EEPROM
logo
Intersil Corporation
ISL12026 INTERSIL-ISL12026 Datasheet
381Kb / 24P
   Real Time Clock/Calendar with EEPROM
ISL12029 INTERSIL-ISL12029 Datasheet
426Kb / 28P
   Real Time Clock/Calendar with EEPROM
logo
Xicor Inc.
X1226 XICOR-X1226 Datasheet
420Kb / 24P
   Real Time Clock/Calendar with EEPROM
logo
Intersil Corporation
ISL12028 INTERSIL-ISL12028 Datasheet
423Kb / 28P
   Real Time Clock/Calendar with EEPROM
X1226 INTERSIL-X1226_06 Datasheet
372Kb / 25P
   Real Time Clock/Calendar with EEPROM
X1226 INTERSIL-X1226 Datasheet
388Kb / 25P
   Real Time Clock/Calendar with EEPROM
X1243 INTERSIL-X1243 Datasheet
293Kb / 17P
   Real Time Clock/Calendar/Alarm with EEPROM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19


bảng dữ liệu tải về

Go To PDF Page


Link URL




Chính sách bảo mật
ALLDATASHEET.VN
Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com