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TA1204AF bảng dữ liệu(PDF) 8 Page - Toshiba Semiconductor |
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TA1204AF bảng dữ liệu(HTML) 8 Page - Toshiba Semiconductor |
8 / 25 page TA1204AF 2001-02-07 8/25 PIN No. PIN NAME FUNCTION INTERFACE CIRCUIT INPUT / OUTPUT SIGNAL 35 B Clamp Fil. Connect B-axis γ input pedestal offset cancel filter. Use G-axis pedestal as reference. 37 G Clamp Fil. Connect G-axis γ input pedestal offset cancel filter. Use brightness adjustment voltage as reference. 41 R Clamp Fil. Connect R-axis γ input pedestal offset cancel filter. Use G-axis pedestal as reference. DC 38 40 42 B In (B) G In (B) R In (B) Input RGB (B) signal. In Clamp mode, input via clamp capacitor. 100IRE = 0.7Vp-p Clamp mode 39 GND GND pin for block to which power is supplied from VCC pin. Connect to 5 and 17 GND pins using short thick line. ― ― 1 43 γ-R Cont γ-B Cont Fine-adjusts R / B-axis γ characteristic. When left open, biased 3.7V. When voltage is adjusted to 3.7V, γ adjustment is typically 78% (at 60% white input). DC input 0 to 5V γ adjustment : 66 to 78% (at 60% white input) 44 γ-Com Cont Adjusts common γ characteristic. Batch-adjusts three axes. When left open, biased 2.5V. When voltage is adjusted to 2.5V, γ adjustment is typically 72% (at 60% white input). DC input 0.9 to 4.9V γ adjustment : 82 to 60% (at white 60% input) |
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Mô tả tương tự - TA1204AF |
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