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MC68HC908AP32CFB bảng dữ liệu(PDF) 10 Page - Motorola, Inc |
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MC68HC908AP32CFB bảng dữ liệu(HTML) 10 Page - Motorola, Inc |
10 / 440 page Table of Contents Data Sheet MC68HC908AP Family — Rev. 2.5 10 MOTOROLA 8.3.9 CGM External Connections . . . . . . . . . . . . . . . . . . . . . . . . 114 8.4 I/O Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 8.4.1 External Filter Capacitor Pin (CGMXFC) . . . . . . . . . . . . . . 115 8.4.2 PLL Analog Power Pin (VDDA) . . . . . . . . . . . . . . . . . . . . . .115 8.4.3 PLL Analog Ground Pin (VSSA) . . . . . . . . . . . . . . . . . . . . .115 8.4.4 Oscillator Output Frequency Signal (CGMXCLK) . . . . . . . 115 8.4.5 CGM Reference Clock (CGMRCLK) . . . . . . . . . . . . . . . . . 115 8.4.6 CGM VCO Clock Output (CGMVCLK) . . . . . . . . . . . . . . . . 116 8.4.7 CGM Base Clock Output (CGMOUT). . . . . . . . . . . . . . . . . 116 8.4.8 CGM CPU Interrupt (CGMINT) . . . . . . . . . . . . . . . . . . . . . 116 8.5 CGM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 8.5.1 PLL Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 8.5.2 PLL Bandwidth Control Register . . . . . . . . . . . . . . . . . . . . 119 8.5.3 PLL Multiplier Select Registers . . . . . . . . . . . . . . . . . . . . . 121 8.5.4 PLL VCO Range Select Register . . . . . . . . . . . . . . . . . . . . 122 8.5.5 PLL Reference Divider Select Register . . . . . . . . . . . . . . . 123 8.6 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 8.7 Special Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 8.7.1 Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 8.7.2 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 8.7.3 CGM During Break Interrupts. . . . . . . . . . . . . . . . . . . . . . . 125 8.8 Acquisition/Lock Time Specifications . . . . . . . . . . . . . . . . . . . 126 8.8.1 Acquisition/Lock Time Definitions. . . . . . . . . . . . . . . . . . . . 126 8.8.2 Parametric Influences on Reaction Time . . . . . . . . . . . . . . 126 8.8.3 Choosing a Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 Section 9. System Integration Module (SIM) 9.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 9.2 SIM Bus Clock Control and Generation . . . . . . . . . . . . . . . . . 131 9.2.1 Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 9.2.2 Clock Start-up from POR or LVI Reset. . . . . . . . . . . . . . . . 132 9.2.3 Clocks in Stop Mode and Wait Mode . . . . . . . . . . . . . . . . . 133 9.3 Reset and System Initialization. . . . . . . . . . . . . . . . . . . . . . . . 133 9.3.1 External Pin Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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