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LF356MWC bảng dữ liệu(PDF) 5 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  JFET Input Operational Amplifier
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5
LF356-MIL
www.ti.com
SNOSD55 – JUNE 2017
Product Folder Links: LF356-MIL
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
(1)
Unless otherwise stated, these test conditions apply:
Supply Voltage, VS
VS = ±15 V
TA
0°C
≤ TA ≤ +70°C
THIGH
+70°C
and VOS, IB and IOS are measured at VCM = 0.
(2)
The Temperature Coefficient of the adjusted input offset voltage changes only a small amount (0.5 μV/°C typically) for each mV of
adjustment from its original unadjusted value. Common-mode rejection and open-loop voltage gain are also unaffected by offset
adjustment.
(3)
The input bias currents are junction leakage currents which approximately double for every 10°C increase in the junction temperature,
TJ. Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the
junction temperature rises above the ambient temperature as a result of internal power dissipation, Pd. TJ = TA + θJA Pd where θJA is the
thermal resistance from junction to ambient. Use of a heat sink is recommended if input bias current is to be kept to a minimum.
(1)
Supply Voltage Rejection is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common
practice.
6.7 DC Electrical Characteristics
See
(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOS
Input offset voltage
RS = 50 Ω
TA = 25°C
3
10
mV
Over temperature
13
ΔVOS/ΔT
Average TC of input
offset voltage
RS = 50 Ω
5
μV/°C
ΔTC/ΔVOS
Change in average TC with
VOS adjust
RS = 50 Ω
(2)
0.5
μV/°C
per mV
IOS
Input offset current
TJ = 25°C
(1) (3)
3
50
pA
TJ ≤ THIGH
2
nA
IB
Input bias current
TJ = 25°C
(1) (3)
30
200
pA
TJ ≤ THIGH
8
nA
RIN
Input resistance
TJ = 25°C
1012
Ω
AVOL
Large signal voltage gain
VS = ±15 V,
VO = ±10 V,
RL = 2 kΩ
TA = 25°C
25
200
V/mV
Over temperature
15
VO
Output voltage swing
VS = ±15 V, RL = 10 kΩ
±12
±13
V
VS = ±15 V, RL= 2 kΩ
±10
±12
VCM
Input common-mode
voltage range
VS = ±15 V
VCM, High
10
15.1
V
VCM, Low
−12
–10
CMRR
Common-mode rejection ratio
80
100
dB
PSRR
Supply voltage rejection
ratio(1)
80
100
dB
(1)
The maximum power dissipation for these devices must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the
ambient temperature, TA. The maximum available power dissipation at any temperature is PD = (TJMAX − TA) / θJA or the 25°C PdMAX,
whichever is less.
(2)
Maximum power dissipation is defined by the package characteristics. Operating the part near the maximum power dissipation may
cause the part to operate outside specified limits.
6.8 Power Dissipation Ratings
MIN
MAX
UNIT
Power Dissipation at
TA = 25°C
(1) (2)
LMC Package (Still Air)
400
mW
LMC Package
(400 LF/Min Air Flow)
1000
P Package
670
D Package
380


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