ACE24AC04.08.16

Two-wire Serial EEPROM

VER 1.2

3

Block Diagram

Pin Description

(A)

Serial Clock (SCL)

The rising edge of this SCL input is to latch data into the EEPROM device while the falling edge of

this clock is to clock data out of the EEPROM device.

(B)

Device / Chip Select Addresses (A2, A1, A0)

These are the chip select input signals for the serial EEPROM devices. Typically, these signals are

has A0 pin as no-connect. ACE24AC08 has both A0 and A1 pins as no-connect. For ACE24AC16,

all device address pins (A0-A2) are no-connect.

(C)

Serial Data Line (SDA)

SDA data line is a bi-directional signal for the serial devices. It is an open drain output signal and can

be wired-OR with other open-drain output devices.

(D)

Write Protect (WP)

The ACE24AC04.08.16 devices have a WP pin to protect the whole EEPROM array from

operations is not affected by the WP pin’s input level.