công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

AS4C16M16MD1 bảng dữ liệu(PDF) 37 Page - Alliance Semiconductor Corporation

tên linh kiện AS4C16M16MD1
Giải thích chi tiết về linh kiện  Programmable output buffer driver strength
Download  55 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  ALSC [Alliance Semiconductor Corporation]
Trang chủ  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS4C16M16MD1 bảng dữ liệu(HTML) 37 Page - Alliance Semiconductor Corporation

Back Button AS4C16M16MD1 Datasheet HTML 33Page - Alliance Semiconductor Corporation AS4C16M16MD1 Datasheet HTML 34Page - Alliance Semiconductor Corporation AS4C16M16MD1 Datasheet HTML 35Page - Alliance Semiconductor Corporation AS4C16M16MD1 Datasheet HTML 36Page - Alliance Semiconductor Corporation AS4C16M16MD1 Datasheet HTML 37Page - Alliance Semiconductor Corporation AS4C16M16MD1 Datasheet HTML 38Page - Alliance Semiconductor Corporation AS4C16M16MD1 Datasheet HTML 39Page - Alliance Semiconductor Corporation AS4C16M16MD1 Datasheet HTML 40Page - Alliance Semiconductor Corporation AS4C16M16MD1 Datasheet HTML 41Page - Alliance Semiconductor Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 37 / 55 page
background image
AS4C16M16MD1
256Mb MOBILE DDR SDRAM
7.8 Auto Precharge
Auto Precharge is a feature which performs the same individual bank precharge function as described above, but without
requiring an explicit command. This is accomplished by using A10 (A10 = High), to enable Auto Precharge in conjunction with a
specific READ or WRITE command. A precharge of the bank / row that is addressed with the READ or WRITE command is
automatically performed upon completion of the read or write burst. Auto Precharge is non persistent in that it is either enabled
or disabled for each individual READ or WRITE command.
Auto Precharge ensures that a precharge is initiated at the earliest valid stage within a burst. The user must not issue another
command to the same bank until the precharging time (tRP) is completed. This is determined as if an xplicit PRECHARGE
command was issued at the earliest possible time, as described for each burst type in the Operation section of this specification.
7.9 Refresh Requirements
LPDDR SDRAM devices require a refresh of all rows in any rolling 64ms interval. Each refresh is generated in one of two ways:
by an explicit AUTO REFRESH command, or by an internally timed event in SELF REFRESH mode. Dividing the number of
device rows into the rolling 64ms interval defines the average refresh interval (tREFI), which is a guideline to controllers for
distributed refresh timing.
7.10 Auto Refresh
AUTO REFRESH command (see Figure 33) is used during normal operation of the LPDDR SDRAM. This command is non
persistent, so it must be issued each time a refresh is required.
CK
CK
CKE
CS
RAS
CAS
WE
A0-An
BA0,BA1
(High)
= Don't Care
Figure 33 — Auto Refresh Command
7.11 Self Referesh
The SELF REFRESH command (see Figure 34) can be used to retain data in the LPDDR SDRAM, even if the rest of the system
is powered down. When in the Self Refresh mode, the LPDDR SDRAM retains data without external clocking. The LPDDR
SDRAM device has a built-in timer to accommodate Self Refresh operation. The SELF REFRESH command is initiated like an
AUTO REFRESH command except CKE is LOW. Input signals except CKE are “Don’t Care” during Self Refresh. The user may
halt the external clock one clock after the SELF REFRESH command is registered.
Once the command is registered, CKE must be held low to keep the device in Self Refresh mode. The clock is internally
disabled during Self Refresh operation to save power. The minimum time that the device must remain in Self Refresh mode is
tRFC.
The procedure for exiting Self Refresh requires a sequence of commands. First, the clock must be stable prior to CKE going
back High. Once Self Refresh Exit is registered, a delay of at least tXS must be satisfied before a valid command can be issued
to the device to allow for completion of any internal refresh in progress.
The use of Self Refresh mode introduces the possibility that an internally timed refresh event can be missed when CKE is raised
for exit from Self Refresh mode. Upon exit from Self Refresh an extra AUTO REFRESH command is recommended.
Figure 36 shows Self Refresh entry and exit.
In the Self Refresh mode, two additional power-saving options exist: Temperature Compensated Self Refresh (TCSR) and
Mar, 28, 2013
- 37 -


Số phần tương tự - AS4C16M16MD1

nhà sản xuấttên linh kiệnbảng dữ liệuGiải thích chi tiết về linh kiện
logo
Alliance Semiconductor ...
AS4C16M16D1 ALSC-AS4C16M16D1 Datasheet
1Mb / 67P
   Fully synchronous operation
AS4C16M16D1-5BCN ALSC-AS4C16M16D1-5BCN Datasheet
1Mb / 67P
   Fully synchronous operation
AS4C16M16D1-5BIN ALSC-AS4C16M16D1-5BIN Datasheet
1Mb / 67P
   Fully synchronous operation
AS4C16M16D1-5TCN ALSC-AS4C16M16D1-5TCN Datasheet
1Mb / 67P
   Fully synchronous operation
AS4C16M16D1-5TIN ALSC-AS4C16M16D1-5TIN Datasheet
1Mb / 67P
   Fully synchronous operation
More results

Mô tả tương tự - AS4C16M16MD1

nhà sản xuấttên linh kiệnbảng dữ liệuGiải thích chi tiết về linh kiện
logo
GSI Technology
GS8342QT37BGD-300I GSI-GS8342QT37BGD-300I Datasheet
503Kb / 29P
   ZQ pin for programmable output drive strength
logo
Alliance Semiconductor ...
2GB-DDR2-AS4C256M8D2 ALSC-2GB-DDR2-AS4C256M8D2 Datasheet
2Mb / 70P
   Weak Strength Data-Output Driver Option
logo
National Semiconductor ...
CLC5612 NSC-CLC5612 Datasheet
304Kb / 18P
   Dual, High Output, Programmable Gain Buffer
LMH6718 NSC-LMH6718 Datasheet
846Kb / 16P
   Dual, High Output, Programmable Gain Buffer
CLC5632 NSC-CLC5632 Datasheet
202Kb / 19P
   Dual, High Output, Programmable Gain Buffer
CLC5633 NSC-CLC5633 Datasheet
188Kb / 17P
   Triple, High Output, Programmable Gain Buffer
logo
Texas Instruments
LP5523 TI1-LP5523 Datasheet
600Kb / 47P
[Old version datasheet]   Programmable 9-Output LED Driver
logo
Unisonic Technologies
U74LVC1G07 UTC-U74LVC1G07 Datasheet
160Kb / 5P
   BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT
U74LVC1G07 UTC-U74LVC1G07_15 Datasheet
173Kb / 5P
   BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT
U74LVC1G07 UTC-U74LVC1G07_V01 Datasheet
182Kb / 5P
   BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55


bảng dữ liệu tải về

Go To PDF Page


Link URL




Chính sách bảo mật
ALLDATASHEET.VN
Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com