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STL19N60DM2 bảng dữ liệu(PDF) 5 Page - STMicroelectronics

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DocID026785 Rev 1
5/13
STL19N60DM2
Electrical characteristics
13
Table 6. Switching times
Symbol
Parameter
Test conditions
Min.
Typ.
Max. Unit
td(on)
Turn-on delay time
VDD = 300 V, ID = 5.5 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 2 and 7)
-
TBD
-
ns
tr
Voltage rise time
-
TBD
-
ns
td(off)
Turn-off delay time
-
TBD
-
ns
tf
Current fall time
-
TBD
-
ns
Table 7. Source drain diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max. Unit
ISD
(1)
1.
The value is rated according to Rthj-case and limited by package.
Source-drain current
-
11
A
ISDM
(1),(2)
2.
Pulse width limited by safe operating area
Source-drain current (pulsed)
-
44
A
VSD
(3)
3.
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Forward on voltage
ISD = 11A, VGS = 0
-
1.5
V
trr
(4)
4.
Typical values are referring to the test conditions of the same die housed in through hole package.
The built-in back-to-back Zener diodes have been specifically designed to enhance the
ESD capability of the device. The Zener voltage is appropriate for efficient and cost-
effective intervention to protect the device integrity. These integrated Zener diodes thus
eliminate the need for external components.
Reverse recovery time
ISD = 11A, di/dt = 100A/µs
VDD = 100 V (see Figure 4)
-120
ns
Qrr
(4)
Reverse recovery charge
-
TBD
µC
IRRM
(4)
Reverse recovery current
-
TBD
A
trr
(4)
Reverse recovery time
ISD = 11 A, di/dt = 100A/µs
VDD = 100 V, Tj = 150 °C
(see Figure 4)
-TBD
ns
Qrr
(4)
Reverse recovery charge
-
TBD
µC
IRRM
(4)
Reverse recovery current
-
TBD
A


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