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Giải thích chi tiết về linh kiện  12-Bit, Single Or Dual, 3200- or 1600-MSPS RF Sampling Analog-to-Digital Converter (ADC)
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
ADC12D1620QML-SP
SNAS717 – APRIL 2017
ADC12D1620QML-SP 12-Bit, Single Or Dual, 3200- or 1600-MSPS RF Sampling
Analog-to-Digital Converter (ADC)
1
1 Features
1
Total Ionizing Dose (TID) to 300 krad(Si)
Single Event Functional Interrupt (SEFI) Tested
Single Event Latch-up (SEL) > 120 MeV-cm2/mg
Cold Sparing Capable
Wide Temperature Range –55°C to +125°C
Power Consumption = 3.8 W or 2.7 W (1600- or
800-MHz Clock)
3-dB Input Bandwidth = 3 GHz
Low-Sampling Power-Saving Mode (LSPSM)
Reduces Power Consumption and Improves
Performance for fCLK ≤ 800 MHz
Auto-Sync Function for Multi-Chip Systems
Time Stamp Feature to Capture External Trigger
Test Patterns at Output for System Debug
1:1 Non-Demuxed or 1:2 or 1:4 Parallel Demuxed
LVDS Outputs
Single 1.9-V Power Supply
2 Applications
Direct RF Down Conversion
Satellite Wideband Communications
Synthetic Aperture RADAR and LIDAR
3 Description
The ADC12D1620QML device uses a package
redesign to achieve better ENOB, SNR, and X-talk
compared
to
the
ADC12D1600QML.
As
is
its
predecessor, the ADC12D1620QML is a low-power,
high-performance CMOS analog-to-digital converter
(ADC) that digitizes signals at a 12-bit resolution at
sampling rates up to 3.2 GSPS in an interleaved
mode. It can also be used as a dual-channel ADC for
sampling rates up to 1.6 GSPS. For sampling rates
below 800 MHz, there is a low-sampling power-
saving
mode
(LSPSM)
that
reduces
power
consumption to less than 1.4 W per channel (typical).
The ADC can support conversion rates as low as 200
MSPS.
Device Information(1)
PART NUMBER
GRADE
PACKAGE
ADC12D1620CCMLS
Flight 300 krad
CCGA (376)
ADC12D1620CCMPR
Pre-flight engineering
prototype
CCGA (376)
ADC10D1000DAISY
Daisy chain, mechanical
sample, no die
CCGA (376)
ADC12D1620LGMLS
Flight 300 krad
CLGA (256)
ADC12D1620LGMPR
Pre-flight engineering
prototype
CLGA (256)
ADC10D1000LDAZ
Daisy chain, mechanical
sample, no die
CLGA (256)
(1) For all available packages, see the package orderable
addendum (POA) at the end of the data sheet.
space
Functional Block Diagram


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ADC12D1620LGMLS TI-ADC12D1620LGMLS Datasheet
3Mb / 83P
[Old version datasheet]   ADC12D1620QML-SP 12-Bit, Single Or Dual, 3200- or 1600-MSPS RF Sampling Analog-to-Digital Converter (ADC)
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