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ADS8578S bảng dữ liệu(PDF) 5 Page - Texas Instruments |
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ADS8578S bảng dữ liệu(HTML) 5 Page - Texas Instruments |
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5 / 58 page  5 ADS8578S www.ti.com SBAS825 – APRIL 2017 Product Folder Links: ADS8578S Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Pin Functions (continued) NAME NO. TYPE(1) DESCRIPTION DB15/BYTE SEL 33 DIO Multifunction logic input or output pin (see the DB15/BYTE SEL section): this pin is ADC data output bit 13 (MSB) in parallel interface mode, and is an active high control input pin to enable parallel byte interface mode. DVDD 23 P Digital supply pin; decouple with AGND on pin 26 FRSTDATA 15 DO Active high digital output indicating data read back from channel 1 of the device (see the FRSTDATA (Output) section) OS0 3 DI Oversampling mode control pin (see the Oversampling Mode of Operation section) OS1 4 DI Oversampling mode control pin (see the Oversampling Mode of Operation section) OS2 5 DI Oversampling mode control pin (see the Oversampling Mode of Operation section) PAR/SER/BYTE SEL 6 DI Logic input pin to select between parallel, serial, or parallel byte interface mode (see the Data Read Operation section) RANGE 8 DI Multifunction logic input pin (see the RANGE (Input) section): when the STBY pin is high, this pin selects the input range of the device (±10 V or ±5 V); when the STBY pin is low, this pin selects between the standby and shutdown modes. RD/SCLK 12 DI Multifunction logic input pin (see the RD/SCLK (Input) section): this pin is an active-low ready input pin in parallel and parallel byte interface, and is a clock input pin in serial interface mode. REFCAPA 44 AO Reference amplifier output pin. This pin must be shorted to REFCAPB and decoupled to AGND using a low equivalent series resistance (ESR), 10-µF ceramic capacitor. REFCAPB 45 AO Reference amplifier output pin. This pin must be shorted to REFCAPA and decoupled to AGND using a low ESR, 10-µF ceramic capacitor. REFGND 43, 46 P Reference GND pin. This pin must be shorted to the analog GND plane and decoupled with REFIN/REFOUT on pin 42 using a 10-µF capacitor. REFIN/REFOUT 42 AIO This pin acts as an internal reference output when REFSEL is high; this pin functions as input pin for the external reference when REFSEL is low; decouple with REFGND on pin 43 using a 10-µF capacitor. REFSEL 34 DI Active high logic input to enable the internal reference (see the REFSEL (Input) section) REGCAP1 36 AO Output pin 1 for the internal voltage regulator; decouple separately to AGND using a 1-µF capacitor REGCAP2 39 AO Output pin 2 for the internal voltage regulator; decouple separately to AGND using a 1-µF capacitor RESET 11 DI Active high logic input to reset the device digital logic (see the RESET (Input) section) STBY 7 DI Active low logic input to enter the device into one of the two power-down modes: standby or shutdown (see the Power-Down Modes section) (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Transient currents of up to 100 mA do not cause SCR latch-up. 7 Specifications 7.1 Absolute Maximum Ratings at TA = 25°C (unless otherwise noted) (1) MIN MAX UNIT AVDD to AGND –0.3 7.0 V DVDD to AGND –0.3 7.0 V Analog input voltage to AGND(2) –15 15 V Digital input to AGND –0.3 DVDD + 0.3 V REFIN to AGND –0.3 AVDD + 0.3 V Input current to any pin except supplies(2) –10 10 mA Temperature Operating –40 125 °C Junction, TJ 150 Storage, Tstg –65 150 |
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