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GS1508-CKA bảng dữ liệu(PDF) 4 Page - Gennum Corporation |
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GS1508-CKA bảng dữ liệu(HTML) 4 Page - Gennum Corporation |
4 / 8 page 522 - 02 - 03 4 DETAILED DESCRIPTION INPUT INTERFACING SDI/SDI are high impedance differential inputs. ( See Figure 1 for equivalent input circuit). Several conditions must be observed when interfacing to these inputs: 1. The differential input signal amplitude must be between 150 and 800mVpp. 2. The common mode voltage range must be as specified in the DC Characteristics table. For a 400mV input from the GS1504 HD cable equalizer, this corresponds to a common mode voltage range of between 2.7 and 4.8 volts. 3. For input trace lengths longer than approximately 1cm, the inputs should be terminated as shown in the Typical Application Circuit. The GS1508 inputs are self biased, allowing for simple AC coupling to the device. For serial digital HDTV, a minimum capacitor value of 4.7µF should be used to allow coupling of pathological test signals. A tantalum capacitor is recommended. OUTPUT INTERFACING The GS1508 outputs are current mode, and will drive 800mV into a 75 ohm load. These outputs are protected from accidental static damage with internal static protection diodes. The SMPTE 292M standard requires that the output of a cable driver have a source impedance of 75 Ω and a return loss of at least 15dB between 5Mhz and 1.485GHz. In order for an HD SDI output circuit using the GS1508 to meet this specification, the output circuit shown in the Typical Application Circuit is recommended. The values of LCOMP and CCOMP will vary depending on PCB layout, but typical values are 12nH and 0.5pF respectively. The small value of CCOMP can be easily swamped by parasitic PCB capacitance, so it is recommended that the ground plane be removed under the GS1508 output circuitry ( see the Application Information section in this data sheet for further details). A 4.7µF capacitor is used for AC coupling the output of the GS1508. This value is chosen to ensure that pathological signals can be coupled without a significant DC component occurring. Fig. 3 Output Optimized for Waveform Symmetry L=8.2nH, R=75 (Typical ORL=13.5dB) Fig. 4 Output Optimized for Return Loss L=12nH, C=0.5pF, R=75 (Typical ORL=18dB) Figures 3 and 4 show the eye diagram of the GS1508 output for two different output compensation conditions. Figure 4 shows the GS1508 output optimized for wideband return loss of 18dB. Figure 3 shows the GS1508 output optimized for output waveform symmetry. In this case the output may not exhibit a return loss of 15dB. When measuring return loss at the GS1508 output it is necessary to take the measurement for both a logic high and a logic low output condition. This is because the output protection diodes act as a varactor (voltage controlled capacitor) as shown in Figure 5. Consequently, the output capacitance of the GS1508 is dependent on the logic state of the output. |
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