11

®

ADC700

FIGURE 10. Serial Data Output Providing Convenient

Isolation.

Isolation Barrier

V

DD

V

DD

Serial

Data

Strobe

Reset

Serial

Data

ADC700

FIGURE 11. Continuous Conversion Circuit Connection.

ADC700

WR

CS

Status

To Interrupt

PIN DESIGNATION

DEFINITION

FUNCTION

CS (Pin 9)

Chip Select

Must be Low to either initiate a conversion or read output data.

WR (Pin 7)

Write (Convert)

Conversion begins after the High-to-Low transition.

RD (Pin 8)

Read

Turns ON the three-state output drivers upon being asserted low.

HBEN (Pin 10)

High Byte Enable

Selects the MSB or the LSB for readout. Data Ready is cleared when HBEN is Low and RD is asserted.

“1” = Low Byte

“0” = High Byte

Reset (Pin 6)

Reset

Resets internal logic. Must be asserted after power-up or a power interruption clears Status and Data

Ready to Low.

BTCEN (Pin 23)

BTC Enable

Sets the output code to Binary Twos Complement (BTC) when Low. Output code is Bipolar Offset Binary

(BOB) when High.

TABLE III. Control Line Functions.

TABLE IV. Control Input Truth Table.

CONTROL LINE

RESET

WR

RD

HBEN

CS

OPERATION

0

X

X

X

X

Reset converter logic. Status and Data Ready set Low.

1

X

X

X

1

No operation.

1

0

X

X

0

Initiate conversion.

1

1

0

0

0

Places High Byte on output port. Clears Data Ready flag.

1

1

0

1

0

Placed Low Byte on output port. Does not clear Data Ready flag.

1

0

0

0

0

Initiates conversion and places High Byte or output port. Clears Data Ready.

1

0

0

1

0

Initiates conversion and places Low Byte on output port. Does not clear Data Ready flag.

NOTE: If a conversion command is asserted while a conversion is in progress, the command is ignored. If the conversion command remains asserted when a

conversion is finished, a new conversion will begin.