Connection Diagrams

Pin Description

Pin No.

Pin

Name

I/O

Description

CSP

TSSOP

16

1

V

P

—

Power supply for charge pump. Must be

≥ V

12

CP

O

O

Charge pump output. Connected to a loop filter for driving the control input of an

external VCO.

2

3

GND

—

Ground for PLL digital circuitry.

34

f

IN

I

RF prescaler input. Small signal input from the VCO.

45

f

INB

I

RF prescaler complimentary input. A bypass capacitor should be placed as close

as possible to this pin and be connected directly to the ground plane.

5

6

GND

—

Ground for PLL analog circuitry.

6

7

OSC

in

I

Oscillator input. A CMOS inverting gate input. The input has a V

threshold and can be driven from an external CMOS or TTL logic gate.

78

F

O

Multiplexed output of N or R divider and lock detect. CMOS output.

8

9

CE

I

pump output when LOW. Bringing CE high powers up PLL depending on the state

of CTL_WORD.

9

10

CLK

I

High impedance CMOS Clock input. Data for the various counters is clocked into

the 24-bit shift register on the rising edge.

10

11

DATA

I

Binary serial data input. Data entered MSB first. The last two bits are the control

bits. High impedance CMOS input.

11

12

LE

I

Load enable high impedance CMOS input. Data stored in the shift registers is

loaded into one of the 4 internal latches when LE goes HIGH.

12

13

GND

—

Ground.

13

14

V

CC

—

PLL power supply voltage input. May range from 2.7V to 5.5V. Bypass capacitors

should be placed as close as possible to this pin and be connected directly to the

ground plane.

14

15

OUT1

—

Programmable CMOS output. Level of the output is controlled by F2[18] bit.

15

16

OUT0

—

Programmable CMOS output. Level of the output is controlled by F2[17] bit.

DS101124-2

TOP VIEW

Order Number LMX2353TM or

LMX2353TMX

See NS Package Number MTC16

DS101124-3

TOP VIEW

Order Number LMX2353SLBX

See NS Package Number SLB16A

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