The following conditions apply; V

≤ T

A

≤ 85˚C, unless specified differently.

Symbol

Parameter

Conditions

Min

Typ

Max

Units

LOGICAL INTERFACE (CE, CLOCK, LE, DATA, LD)

V

IH

High-level Input Voltage

0.8 V

CC

V

V

IL

Low-level Input Voltage

0.2 V

CC

V

I

IH

High-level Input Current

V

−1.0

1.0

µA

I

IL

Low-level Input Current

V

−1.0

1.0

µA

V

OH

High-level Output Voltage

I

V

V

V

OL

Low-level Output Voltage

I

0.4

V

MICROWIRE INTERFACE (CLOCK, LE, DATA)

t

CS

Data to Clock Set Up Time

(Note 5)

50

ns

t

CH

Data to Clock Hold Time

(Note 5)

10

ns

t

CWH

Clock Pulse Width High

(Note 5)

50

ns

t

CWL

Clock Pulse Width Low

(Note 5)

50

ns

t

ES

Clock to Latch Enable Set Up

Time

(Note 5)

50

ns

t

EW

Latch Enable Pulse Width

(Note 5)

50

ns

PHASE NOISE

L(f)

Single Side-Band Phase Noise

F

F

V

T

(Note 3)

−91

dBc/Hz

F

F

V

T

(Notes 3, 9)

−86

dBc/Hz

F

F

V

T

(Note 3)

−85

dBc/Hz

F

F

V

T

(Note 3)

−83

dBc/Hz

L

Normalized Single Side-Band

Phase Noise

F

V

T

(Note 8)

−164.5

dBc/Hz

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate conditions for

which the device is intended to be functional. For guaranteed specifications and test conditions see the Electrical Characteristics.

protected workstations.

Note 3: Phase Noise is measured using a reference evaluation board with a loop bandwidth of approximately 12 kHz. The phase noise specification is the

composite average of 3 measurements made at frequency offsets of 2.0, 2.5 and 3.0 kHz.

Note 4: See Charge Pump Measurement Definitions for detail on how these measurements are made.

Note 5: See Serial Input Data Timing.

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