MC145149

MOTOROLA

9

the desired operating frequency, should be connected as

shown in Figure 10.

For VDD = 5.0 V, the crystal should be specified for a load-

ing capacitance, CL, which does not exceed 32 pF for fre-

quencies to approximately 8 MHz, 20 pF for frequencies in

the area of 8 to 15 MHz, and 10 pF for higher frequencies.

These are guidelines that provide a reasonable compromise

between IC capacitance, drive capability, swamping varia-

tions in stray and IC input/output capacitance, and realistic

CL values. The shunt load capacitance, CL, presented

across the crystal can be estimated to be:

CL =

CinCout

Cin + Cout

+ Ca + CO +

C1 + C2

where

Cin = 5 pF (see Figure 11)

Cout = 6 pF (see Figure 11)

Ca = 1 pF (see Figure 11)

CO= the crystal’s holder capacitance (see Figure 12)

C1 and C2 = external capacitors (see Figure 10)

The oscillator can be “trimmed” on–frequency by making a

portion or all of C1 variable. The crystal and associated com-

ponents must be located as close as possible to the OSCin

and OSCout pins to minimize distortion, stray capacitance,

stray inductance, and startup stabilization time. In some

cases, stray capacitance should be added to the value for Cin

and Cout.

Power is dissipated in the effective series resistance of the

crystal, Re, in Figure 12. The drive level specified by the crys-

tal manufacturer is the maximum stress that a crystal can

withstand without damaging or excessive shift in frequency.

R1 in Figure 10 limits the drive level. The use of R1 may not

be necessary in some cases (i.e., R1 = 0

Ω).

To verify that the maximum dc supply voltage does not

overdrive the crystal, monitor the output frequency as a func-

tion of voltage at OSCout. (Care should be taken to minimize

loading.) The frequency should increase very slightly as the

dc supply voltage is increased. An overdriven crystal will de-

crease in frequency or become unstable with an increase in

supply voltage. The operating supply voltage must be re-

duced or R1 must be increased in value if the overdriven

condition exists. The user should note that the oscillator

start–up time is proportional to the value of R1.

Through the process of supplying crystals for use with

CMOS inverters, many crystal manufacturers have devel-

oped expertise in CMOS oscillator design with crystals. Dis-

cussions with such manufacturers can prove very helpful

(see Table 1).

Figure 10. Pierce Crystal Oscillator Circuit

R1*

OSCout

C2

C1

Rf

FREQUENCY

SYNTHESIZER

* May be deleted in certain cases. See text.

OSCin

Figure 11. Parasitic Capacitances of the Amplifier

Cin

Cout

Ca

NOTE: Values are supplied by crystal manufacturer

(parallel resonant crystal).

2

1

2

1

2

1

RS

LS

CS

Re

Xe

CO

Figure 12. Equivalent Crystal Networks

RECOMMENDED READING

Technical Note TN–24, Statek Corp.

Technical Note TN–7, Statek Corp.

E. Hafner, “The Piezoelectric Crystal Unit – Definitions and

Method of Measurement”,

Proc. IEEE, Vol. 57, No. 2 Feb.,

1969.

D. Kemper, L. Rosine, “Quartz Crystals for Frequency

Control”,

Electro–Technology, June, 1969.

P. J. Ottowitz, “A Guide to Crystal Selection”,

Electronic

Design, May, 1966.

Table 1. Partial List of Crystal Manufacturers

Name

Address

Phone

United States Crystal Corp.

Crystek Crystal

Statek Corp.

3605 McCart Ave., Ft. Worth, TX 76110

2351 Crystal Dr., Ft. Myers, FL 33907

512 N. Main St., Orange, CA 92668

(817) 921–3013

(813) 936–2109

(714) 639–7810

NOTE: Motorola cannot recommend one supplier over another and in no way suggests that this is a complete

listing of crystal manufacturers.