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MC14415DW bảng dữ liệu(PDF) 2 Page - Motorola, Inc

tên linh kiện MC14415DW
Giải thích chi tiết về linh kiện  Quad Precision Timer/Driver
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nhà sản xuất  MOTOROLA [Motorola, Inc]
Trang chủ  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MC14415DW bảng dữ liệu(HTML) 2 Page - Motorola, Inc

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MOTOROLA CMOS LOGIC DATA
291
MC14415
ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)
Characteristic
Symbol
VDD
Vdc
– 55
_C
25
_C
125
_C
Unit
Characteristic
Symbol
VDD
Vdc
Min
Max
Min
Typ #
Max
Min
Max
Unit
Output Voltage
“0” Level
(No Load)
“1” Level
VOL
5.0
10
15
0.01
0.01
0
0
0.01
0.01
0.05
0.05
Vdc
“1” Level
VOH
5.0
10
15
3.0
8.0
4.14
9.09
14.12
Vdc
Noise Immunity
(
∆Vout v 1.5 Vdc)
(
∆Vout v 3.0 Vdc)
(
∆Vout v 4.5 Vdc)
(
∆Vout v 1.5 Vdc)
(
∆Vout v 3.0 Vdc)
(
∆Vout v 4.5 Vdc)
VNL
5.0
10
15
1.5
3.0
1.5
3.0
2.25
4.50
6.75
1.4
2.9
Vdc
v 1.5 Vdc)
(
∆Vout v 3.0 Vdc)
(
∆Vout v 4.5 Vdc)
(
∆Vout v 1.5 Vdc)
(
∆Vout v 3.0 Vdc)
(
∆Vout v 4.5 Vdc)
VNH
5.0
10
15
1.4
2.9
1.5
3.0
2.25
4.50
6.75
1.5
3.0
Vdc
Output Drive Voltage (NPN Driver)
(IOH = 0 mA)
Source
(IOH = 5.0 mA)
(IOH = 10 mA)
(IOH = 15 mA)
VOH
5.0
3.0
2.7
2.5
2.2
4.14
3.44
3.30
3.08
Vdc
(IOH = 0 mA)
(IOH = 5.0 mA)
(IOH = 10 mA)
(IOH = 15 mA)
10
8.0
7.7
7.5
7.1
9.09
8.45
8.30
8.14
Vdc
(IOH = 0 mA)
(IOH = 5.0 mA)
(IOH = 10 mA)
(IOH = 15 mA)
15
14.12
13.81
13.70
13.61
Vdc
Output Drive Current
(VOL = 0.4 Vdc)
Sink
(VOL = 0.5 Vdc)
(VOL = 1.5 Vdc)
IOL
5.0
10
15
0.23
0.60
0.2
0.5
0.78
2.0
7.8
0.16
0.40
mAdc
Input Leakage Current
Iin
15
± 0.3
±0.00001
± 0.3
± 1.0
µAdc
Input Capacitance
(Vin = 0)
Cin
5.0
pF
Quiescent Dissipation
PQ
5.0
10
15
0.25
1.0
0.00005
0.00022
0.00050
0.25
1.0
3.5
14
mW
Power Dissipation**
(Dynamic plus Quiescent)
(CL = 15 pF)
PD
5.0
10
15
PD (56 mW/MHz) f + PQ
PD (225 mW/MHz) f + PQ
PD (510 mW/MHz) f + PQ
mW
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
** The formulas given are for the typical characteristics only.
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However,
precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance
circuit. For proper operation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must
be left open.


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