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MC145159VF1 bảng dữ liệu(PDF) 2 Page - Motorola, Inc |
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MC145159VF1 bảng dữ liệu(HTML) 2 Page - Motorola, Inc |
2 / 12 page MC145159–1 MOTOROLA 2 BLOCK DIAGRAM * FSO is not and cannot be used as a digital phase detector output. fV fR VSS′ VDD′ APDout CR RO RR CH CHARGE SRout MC FSO LD LOCK DETECTOR DIGITAL FREQUENCY STEERING ANALOG PHASE DETECTOR 10-BIT S/R 10-BIT LATCH 10-BIT ÷ N COUNTER 7-BIT S/R 7-BIT LATCH 7-BIT ÷ A COUNTER CONTROL LOGIC 14-BIT ÷ R COUNTER 14-BIT LATCH 14-BIT S/R 1-BIT S/R CLK DATA fin OSCin OSCout ENB MAXIMUM RATINGS* (Voltages Referenced to VSS) Symbol Parameter Value Unit VDD DC Supply Voltage – 0.5 to + 10 V Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V Iin, Iout Input or Output Current (DC or Transient), per Pin ± 10 mA IDD, ISS Supply Current, VDD or VSS Pins ± 30 mA PD Power Dissipation, per Package 500 mW Tstg Storage Temperature – 65 to + 150 °C TL Lead Temperature (8–Second Soldering) 260 °C * Maximum Ratings are those values beyond which damage to the device may occur. This device contains circuitry to protect the inputs against damage due to high static volt- ages or electric fields; however, it is advised that normal precautions be taken to avoid applica- tions of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation it is recommended that Vin and Vout be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). |
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