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MC145166 bảng dữ liệu(PDF) 3 Page - Motorola, Inc |
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MC145166 bảng dữ liệu(HTML) 3 Page - Motorola, Inc |
3 / 11 page MC145166 •MC145167 MOTOROLA 3 MAXIMUM RATINGS* (Voltages Referenced to VSS) Symbol Rating Value Unit VDD DC Supply Voltage – 0.5 to + 6.0 V Vin Input Voltage, All Inputs – 0.5 to VDD + 0.5 V Iin, Iout DC Current Drain Per Pin 10 mA IDD, ISS DC Current Drain VDD or VSS Pins 30 mA Tstg Storage Temperature Range – 65 to + 150 °C * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the limits in the Electrical Characteristics tables or Pin Descriptions section. ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS, TA = 25°C) Sb l Ch i i V Guaranteed Limit Ui Symbol Characteristic VDD Min Max Unit VDD Power Supply Voltage Range — 2.5 5.5 V VOL Output Voltage 0 Level (Iout = 0) 2.5 5.5 — — 0.05 0.05 V VOH (Vin = VDD or 0) 1 Level 2.5 5.5 2.45 5.45 — — VIL Input Voltage 0 Level (Vout = 0.5 V or VDD – 0.5 V) 2.5 5.5 — — 0.75 1.65 V VIH 1 Level 2.5 5.5 1.75 3.85 — — IOH Output Current (Vout = 2.2 V) Source (Vout = 5.0 V) 2.5 5.5 – 0.18 – 0.55 — — mA IOL (Vout = 0.3 V) Sink (Vout = 0.5 V) 2.5 5.5 0.18 0.55 — — IIL Input Current OSCin, fin1, fin2 (Vin = 0) 2.5 5.5 — — – 30 – 66 µA DATA, SB, Mode 2.5 5.5 — — – 0.05 – 0.11 IIH (Vin = VDD – 0.5) OSCin, fin1, fin2 2.5 5.5 — — 30 66 µA DATA, SB, Mode 2.5 5.5 — — 50 121 Cin Input Capacitance — — 14.0 pF Cout Output Capacitance — — 8.0 pF IDD Standby Current, SB = VSS or Open 2.5 5.5 — — 1.4 3.6 mA Idd Operating Current (200 mV p–p input at fin1 and fin2, SB = VDD) 2.5 5.5 — — 2.8 6.2 mA IOZ Three–State Leakage Current (Vout = 0 or 5.5 V) 5.5 — ± 1.0 µA This device contains protection circuitry to guard against damage due to high static volt- ages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper oper- ation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. |
Số phần tương tự - MC145166 |
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Mô tả tương tự - MC145166 |
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