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MC14501UB bảng dữ liệu(PDF) 1 Page - Motorola, Inc

tên linh kiện MC14501UB
Giải thích chi tiết về linh kiện  Dual 4?밒nput ?쏯AND??Gate 2?밒nput ?쏯OR/OR??Gate 8?밒nput ?쏛ND/NAND??Gate
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nhà sản xuất  MOTOROLA [Motorola, Inc]
Trang chủ  http://www.freescale.com
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MC14501UB bảng dữ liệu(HTML) 1 Page - Motorola, Inc

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MOTOROLA CMOS LOGIC DATA
1
MC14501UB
Triple Gate
Dual 4–Input “NAND” Gate
2–Input “NOR/OR” Gate
8–Input “AND/NAND” Gate
The MC14501UB is constructed with MOS P–channel and N–channel
enhancement mode devices in a single monolithic structure. These
complementary MOS logic gates find primary use where low power
dissipation and/or high noise immunity is desired. Additional characteristics
can be found on the Family Data Sheet.
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Logic Swing Independent of Fanout
• Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range
MAXIMUM RATINGS* (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
DC Supply Voltage
– 0.5 to + 18.0
V
Vin, Vout Input or Output Voltage (DC or Transient)
– 0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current (DC or Transient),
per Pin
± 10
mA
PD
Power Dissipation, per Package†
500
mW
Tstg
Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature (8–Second Soldering)
260
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/
_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/
_C From 100_C To 125_C
CIRCUIT SCHEMATIC
(5) 4
(9) 3
(7) 2
(6) 1
13 (10)
VDD
16
VSS
8
VDD
11
12
14
15
VSS
VSS
Numbers in parenthesis are for second 4–input gate.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
© Motorola, Inc. 1995
REV 3
1/94
MC14501UB
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
TA = – 55° to 125°C for all packages.
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
LOGIC DIAGRAM
(POSITIVE LOGIC)
MC14XXXBCP
Plastic
MC14XXXBCL
Ceramic
MC14XXXBD
SOIC
1
2
3
4
11
12
5
6
7
9
13
14 AND
15 NAND
10
VDD = PIN 16
VSS = PIN 8
Use Dotted Connection Externally to
Obtain 8–Input AND/NAND
NOTE: Pin 14 must not be used as an input
NOTE: to the inverter.


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