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AD6684 bảng dữ liệu(PDF) 2 Page - Analog Devices |
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AD6684 bảng dữ liệu(HTML) 2 Page - Analog Devices |
2 / 107 page AD6684 Data Sheet Rev. 0 | Page 2 of 107 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 3 General Description ......................................................................... 4 Product Highlights ........................................................................... 4 Specifications..................................................................................... 5 DC Specifications ......................................................................... 5 AC Specifications.......................................................................... 6 Digital Specifications ................................................................... 8 Switching Specifications .............................................................. 9 Timing Specifications .................................................................. 9 Absolute Maximum Ratings.......................................................... 11 Thermal Characteristics ............................................................ 11 ESD Caution................................................................................ 11 Pin Configuration and Function Descriptions........................... 12 Typical Performance Characteristics ........................................... 14 Equivalent Circuits ......................................................................... 21 Theory of Operation ...................................................................... 23 ADC Architecture ...................................................................... 23 Analog Input Considerations.................................................... 23 Voltage Reference ....................................................................... 25 Clock Input Considerations ...................................................... 26 Temperature Diode .................................................................... 27 ADC Overrange and Fast Detect.................................................. 28 ADC Overrange.......................................................................... 28 Fast Threshold Detection (FD_A, FD_B, FD_C and FD_D).... 28 Signal Monitor ................................................................................ 29 SPORT Over JESD204B............................................................. 29 Digital Downconverter (DDC)..................................................... 32 DDC I/Q Input Selection .......................................................... 32 DDC I/Q Output Selection ....................................................... 32 DDC General Description ........................................................ 32 Frequency Translation ................................................................... 38 General Description................................................................... 38 DDC NCO + Mixer Loss and SFDR........................................ 39 Numerically Controlled Oscillator........................................... 39 FIR Filters ........................................................................................ 41 General Description................................................................... 41 Half-Band Filters ........................................................................ 42 DDC Gain Stage ......................................................................... 44 DDC Complex to Real Conversion ......................................... 44 DDC Example Configurations ................................................. 45 Noise Shaping Requantizer (NSR) ............................................... 49 Decimating Half-Band Filter .................................................... 49 NSR Overview ............................................................................ 50 Variable Dynamic Range (VDR) .................................................. 51 VDR Real Mode.......................................................................... 52 VDR Complex Mode ................................................................. 52 Digital Outputs ............................................................................... 54 Introduction to the JESD204B Interface ................................. 54 JESD204B Overview .................................................................. 54 Functional Overview ................................................................. 56 JESD204B Link Establishment ................................................. 56 Physical Layer (Driver) Outputs .............................................. 57 JESD204B Tx Converter Mapping ........................................... 59 Setting Up the AD6684 Digital Interface ................................ 60 Latency............................................................................................. 64 End-To-End Total Latency........................................................ 64 Multichip Synchronization............................................................ 65 SYSREF± Setup/Hold Window Monitor................................. 67 Test Modes....................................................................................... 69 ADC Test Modes ........................................................................ 69 JESD204B Block Test Modes .................................................... 70 Serial Port Interface........................................................................ 72 Configuration Using the SPI..................................................... 72 Hardware Interface..................................................................... 72 SPI Accessible Features.............................................................. 72 Memory Map .................................................................................. 73 Reading the Memory Map Register Table............................... 73 Memory Map .................................................................................. 74 Memory Map Summary ............................................................ 74 Memory Map Details ................................................................. 82 Applications Information ............................................................ 106 Power Supply Recommendations........................................... 106 Exposed Pad Thermal Heat Slug Recommendations.......... 106 AVDD1_SR (Pin 64) and AGND_SR (Pin 63 and Pin 67). 106 Outline Dimensions ..................................................................... 107 Ordering Guide ........................................................................ 107 |
Số phần tương tự - AD6684 |
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Mô tả tương tự - AD6684 |
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