công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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X1243S8 bảng dữ liệu(PDF) 1 Page - Xicor Inc. |
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X1243S8 bảng dữ liệu(HTML) 1 Page - Xicor Inc. |
1 / 18 page ©Xicor, Inc. 1994, 1995, 1996 Patents Pending 9900-3003.1 4/1/99 1 Characteristics subject to change without notice 16K 2-Wire™ RTC Real Time Clock/Calendar/Alarm with EEPROM FEATURES • 2 Alarms—Interrupt Output —Settable on the Second, 10s of Seconds, Minute, 10s of Minutes, Hour, Day, Month, or Day of the Week —Repeat alarm for time base generation • 2 Wire Interface interoperable with I2C. —400kHz data transfer rate • Secondary Power Supply Input with internal switch-over circuitry. • Year 2000 Compliant • 2K bytes of EEPROM —64 Byte Page Write Mode —3 bit Block Lock • Low Power CMOS —<1 µA Operating Current —<3mA Active Current during Program —<400 µA Active Current during Data Read • Single Byte Write Capability • Typical Nonvolatile Write Cycle Time: 5ms • High Reliability —100,000 Endurance Cycles —Guaranteed Data Retention: 100 Years • Small Package Options —8-Lead SOIC Package, 8L TSSOP Package DESCRIPTION The X1243 is a Real Time Clock with clock/calendar circuits and two alarms. The dual port clock and alarm registers allow the clock to operate, without loss of accuracy, even during read and write operations. The clock/calendar provides functionality that is con- trollable and readable through a set of registers. The clock, using a low cost 32.768kHz crystal input, accu- rately tracks the time in seconds, minutes, hours, date, day, month and years. It has leap year correction, automatic adjustment for the year 2000 and months with less than 31 days. An alarm match of the RTC sets an interrupt flag and activates an interrupt pin. An alternative alarm function provides a pulsed interrupt for long time constant time- bases. The device offers a backup power input pin. This Vback pin allows the device to be backed up by a non- rechargeable battery. The RTC is fully operational from 1.8 to 5.5 volts. The X1243 provides a 2K byte EEPROM array, giving a safe, secure memory for critical user and configura- tion data. This memory is unaffected by complete fail- ure of the main and backup supplies. BLOCK DIAGRAM X1 X2 Oscillator Frequency Timer Logic Divider Calendar 8 32.768kHz Control Registers 1Hz Time Keeping Registers Alarm Regs Compare IRQ Control Decode Logic Alarm (EEPROM) (EEPROM) (SRAM) SCL SDA Serial Interface Decoder Interrupt Enable 16K EEPROM Array Register Status (SRAM) Alarm Alarm X1243 |
Số phần tương tự - X1243S8 |
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Mô tả tương tự - X1243S8 |
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