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MC13175D bảng dữ liệu(PDF) 9 Page - Motorola, Inc |
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MC13175D bảng dữ liệu(HTML) 9 Page - Motorola, Inc |
9 / 17 page MC13175 MC13176 9 MOTOROLA RF/IF DEVICE DATA For C = 0.47 µ; then, R1 = t1/C = 33.8 10–3/0.47 10–6 = 72 k dthus, R2 = t2/C = 0.283 10–3/0.47 10–6 = 0.60 k In the above example, the following standard value components are used, C = 0.47 µ; R2 = 620 and R′1 = 72 k – 53 k ~ 18 k (R ′1 is defined as R1 – 53 k, the output impedance of the phase detector.) Since the output of the phase detector is high impedance (~50 k) and serves as a current source, and the input to the frequency control, Pin 6 is low impedance (impedance of the two diode to ground is approximately 500 Ω), it is imperative that the second order low pass filter design above be modified. In order to minimize loading of the R2C shunt network, a higher impedance must be established to Pin 6. A simple solution is achieved by adding a low pass network between the passive second order network and the input to Pin 6. This helps to minimize the loading effects on the second order low pass while further suppressing the sideband spurs of the crystal oscillator. A low pass filter with R3 = 1.0 k and C2 = 1500 p has a corner frequency (fc) of 106 kHz; the reference sideband spurs are down greater than – 60 dBc. Figure 14. Modified Low Pass Loop Filter Pin 6 1500p C3 R3 1.0k VCC 0.47 C 620 R2 R ′1 18k Pin 7 Hold–In Range The hold–in range, also called the lock range, tracking range and synchronization range, is the ability of the CCO frequency, fo to track the input reference signal, fref • N as it gradually shifted away from the free running frequency, ff. Assuming that the CCO is capable of sufficient frequency deviation and that the internal loop amplifier and filter are not overdriven, the CCO will track until the phase error, θe approaches ±π/2 radians. Figures 5 through 8 are a direct measurement of the hold–in range (i.e. ∆fref N = ±∆fH 2 π). Since sin θe cannot exceed ±1.0, as θe approaches ±π/2 the hold–in range is equal to the DC loop gain, Kv N. ±∆ωH = ± Kv N where, Kv = KpKoKn. In the above example, ±∆ωH = ± 27.3 Mrad/sec ±∆fH = ± 4.35 MHz Extended Hold–in Range The hold–in range of about 3.4% could cause problems over temperature in cases where the free–running oscillator drifts more than 2 to 3% because of relatively high temperature coefficients of the ferrite tuned CCO inductor. This problem might worsen for lower frequency applications where the external tuning coil is large compared to internal capacitance at Pins 1 and 4. To improve hold–in range performance, it is apparent that the gain factors involved must be carefully considered. Kn = is either 1/8 in the MC13175 or 1/32 in the Kn = MC13176. Kp = is fixed internally and cannot be altered. Ko = Figures 9 and 10 suggest that there is capability Ko = of greater control range with more current swing. Ko = However, this swing must be symmetrical about Ko = the center of the dynamic response. The Ko = suggested zero current operating point for Ko = ±100 µA swing of the CCO is at about + 70 µA Ko = offset point. Ka = External loop amplification will be necessary Ka = since the phase detector only supplies ± 30 µA. In the design example in Figure 15, an external resistor (R5) of 15 k to VCC (3.0 Vdc) provides approximately 100 µA of current boost to supplement the existing 50 µA internal source current. R4 (1.0 k) is selected for approximately 0.1 Vdc across it with 100 µA. R1, R2 and R3 are selected to set the potential at Pin 7 and the base of 2N4402 at approximately 0.9 Vdc and the emitter at 1.55 Vdc when error current to Pin 6 is approximately zero µA. C1 is chosen to reduce the level of the crystal sidebands. Figure 15. External Loop Amplifier 68k Phase Detector Output 30 µA 30 µA R1 1000p C1 7 R2 33k 2N4402 1.0k R3 4.7k R4 R5 VCC = 3.0Vdc 1.6V 15k 50 µA Oscillator Control Circuitry 12 5, 10, 15 6 |
Số phần tương tự - MC13175D |
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Mô tả tương tự - MC13175D |
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