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MC74HCXXXN bảng dữ liệu(PDF) 4 Page - Motorola, Inc |
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MC74HCXXXN bảng dữ liệu(HTML) 4 Page - Motorola, Inc |
4 / 13 page MC54/74HC160 MC54/74HC162 MOTOROLA High–Speed CMOS Logic Data DL129 — Rev 6 4 TIMING REQUIREMENTS (Input tr = tf = 6 ns) Symbol Parameter VCC V Guaranteed Limit Unit Symbol Parameter VCC V – 55 to 25 _C v 85_C v 125_C Unit tsu Minimum Setup Time, Preset Data Inputs to Clock (Figure 5) 2.0 4.5 6.0 150 30 26 190 38 33 225 45 38 ns tsu Minimum Setup Time, Load to Clock (Figure 5) 2.0 4.5 6.0 135 27 23 170 34 29 205 41 35 ns tsu Minimum Setup Time, Reset to Clock (HC162 only) (Figure 4) 2.0 4.5 6.0 160 32 27 200 40 34 240 48 41 ns tsu Minimum Setup Time, Enable T or Enable P to Clock (Figure 6) 2.0 4.5 6.0 200 40 34 250 50 43 300 60 51 ns th Minimum Hold Time, Clock to Preset Data Inputs (Figure 5) 2.0 4.5 6.0 50 10 9 65 13 11 75 15 13 ns th Minimum Hold Time, Clock to Load (Figure 5) 2.0 4.5 6.0 3 3 3 3 3 3 3 3 3 ns th Minimum Hold Time, Clock to Reset (HC162 only) (Figure 4) 2.0 4.5 6.0 3 3 3 3 3 3 3 3 3 ns th Minimum Hold Time, Clock to Enable T or Enable P (Figure 6) 2.0 4.5 6.0 3 3 3 3 3 3 3 3 3 ns trec Minimum Recovery Time, Reset Inactive to Clock (HC160 only) (Figure 2) 2.0 4.5 6.0 125 25 21 155 31 26 190 38 32 ns trec Minimum Recovery Time, Load Inactive to Clock (Figure 5) 2.0 4.5 6.0 125 25 21 155 31 26 190 38 32 ns tw Minimum Pulse Width, Clock (Figure 1) 2.0 4.5 6.0 80 16 14 100 20 17 120 24 20 ns tw Minimum Pulse Width, Reset (HC160 only) (Figure 2) 2.0 4.5 6.0 80 16 14 100 20 17 120 24 20 ns tr, tf Maximum Input Rise and Fall Times (Figure 1) 2.0 4.5 6.0 1000 500 400 1000 500 400 1000 500 400 ns NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). |
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Mô tả tương tự - MC74HCXXXN |
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