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MC74HCXXXAD bảng dữ liệu(PDF) 3 Page - Motorola, Inc |
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MC74HCXXXAD bảng dữ liệu(HTML) 3 Page - Motorola, Inc |
3 / 9 page MC54/74HC164A High–Speed CMOS Logic Data DL129 — Rev 6 3–3 MOTOROLA DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) Unit Guaranteed Limit VCC V Test Conditions Parameter Symbol Unit v 125_C v 85_C –55 _C to 25 _C VCC V Test Conditions Parameter Symbol VOL Maximum Low–Level Output Voltage Vin = VIH or VIL |Iout| v 20 µA 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 V Vin = VIH or VIL |Iout| v 2.4 mA |Iout| v 4.0 mA |Iout| v 5.2 mA 3.0 4.5 6.0 0.26 0.26 0.26 0.33 0.33 0.33 0.40 0.40 0.40 Iin Maximum Input Leakage Current Vin = VCC or GND 6.0 ± 0.1 ± 1.0 ± 1.0 µA ICC Maximum Quiescent Supply Current (per Package) Vin = VCC or GND Iout = 0 µA 6.0 4 40 160 µA NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns) Symbol Parameter VCC V Guaranteed Limit Unit Symbol Parameter VCC V –55 _C to 25 _C v 85_C v 125_C Unit fmax Maximum Clock Frequency (50% Duty Cycle) (Figures 1 and 4) 2.0 3.0 4.5 6.0 10 20 40 50 10 20 35 45 10 20 30 40 MHz tPLH, tPHL Maximum Propagation Delay, Clock to Q (Figures 1 and 4) 2.0 3.0 4.5 6.0 160 100 32 27 200 150 40 34 250 200 48 42 ns tPHL Maximum Propagation Delay, Reset to Q (Figures 2 and 4) 2.0 3.0 4.5 6.0 175 100 35 30 220 150 44 37 260 200 53 45 ns tTLH, tTHL Maximum Output Transition Time, Any Output (Figures 1 and 4) 2.0 3.0 4.5 6.0 75 27 15 13 95 32 19 16 110 36 22 19 ns Cin Maximum Input Capacitance — 10 10 10 pF NOTES: 1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). 2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). CPD Power Dissipation Capacitance (Per Package)* Typical @ 25 °C, VCC = 5.0 V pF CPD Power Dissipation Capacitance (Per Package)* 180 pF * Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). |
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