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LM4652TA bảng dữ liệu(PDF) 6 Page - National Semiconductor (TI) |
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LM4652TA bảng dữ liệu(HTML) 6 Page - National Semiconductor (TI) |
6 / 20 page LM4652 Pin Descriptions Pin No. Symbol Description 1 GND A ground reference for the thermal shut down circuitry. 2LG 1 Low−Gate #1 is the gate input to a bottom side MOSFET in the H-Bridge. 3−V EE The negative voltage supply input for the power MOSFET H-Bridge. 4 TSD The thermal shut down flag pin. This pin transitions to 6V when the die temperature exceeds 150˚C. 5 NC No connection 6LG 2 Low−Gate #2 is the gate input to a bottom side MOSFET in the H-Bridge. 7VO 2 The switching output pin for one side of the H-Bridge. 8 NC No connection. 9 NC No connection. 10 HG 2 High−Gate #2 is the gate input to a top side MOSFET in the H-Bridge. 11 NC No connection. 12 NC No connection. 13 +V CC The positive voltage supply input for the power MOSFET H-Bridge. 14 HG 1 High−Gate #1 is the gate input to a top side MOSFET in the H-Bridge. 15 VO 2 The switching output pin for one side of the H-Bridge. Note: NC, no connect pins are floating pins. It is best to connect the pins to GND to minimize any noise from being coupled into the pins. External Components Description (Refer to Figure 1) Components Functional Description 1. R 1 Works with R 2,Rfl1 and Rfl2 to set the gain of the system. Gain = [(R2/R1) x ((Rfl1 + R fl2)/ Rfl2)−(R2/R1) + .5]. 2. R 2 See description above for R 1. 3. R f Sets the gain and bandwidth of the system by creating a low pass filter for the Error Amplifier’s feedback with C f. 3dB pole is at fC = 1/(2πRfCf) (Hz). 4. C f See description above for R f. 5. R fI1 Provides a reduction in the feedback with R fI2.RfI1should be 10 X RfI2 minimum to reduce effects on the pole created by R fI2 and CfI1. See also note for R1,R2 for effect on System Gain. 6. R fI2 R fI2 and CfI1 creates a low pass filter with a pole at fC = 1/(2πRfI2CfI1) (Hz). See also note for R 1,R2 for effect on System Gain. 7. C fI1 See description above for R fI2. 8. R fI3 Establish the second pole for the low pass filter in the feedback path at f C = 1/(2 πR fI3CfI2) (Hz). 9. C fI2 See description above for R fI3. 10. L 1 Combined with C BYP creates a 2−pole, low pass output filter that has a −3dB pole at fC = 1/[2 π(L 12CBYP) 1 ⁄2 ] (Hz). 11. C 1 Filters high frequency noise from the amplifier’s output to ground. Recommended value is 0.1µF to 1µF. 12. C byp See description for L 1. 13. C B1−CB4 Bypass capacitors for V CC,VEE, analog and digital voltages (VDD, +6V, −6V). See Supply Bypassing and High Frequency PCB Design in the Application Information section for more information. 14. B BT Provides the bootstrap capacitance for the boot strap pin. 15. R DLY Sets the dead time or break before make to T DLY = (1.7x10 −12)(500+R DLY) (seconds). 16. C START Controls the startup time with T START = (8.5x10 4)C START (seconds). 17. R SCKT Sets the output short circuit current with I SCKT = (1x10 5)/ (10k Ω\ R SCKT) (A). 18. R OSC Controls the switching frequency with f SW = 1X10 9 / (4000 + R OSC) (Hz). 19. D 1 Schottky diode to protect the output MOSFETs from fly back voltages. www.national.com 6 |
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