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LM4560 bảng dữ liệu(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
tên linh kiện LM4560
Giải thích chi tiết về linh kiện  Advanced PCI Audio Accelerator
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LM4560 bảng dữ liệu(HTML) 5 Page - National Semiconductor (TI)

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1.0 Pin Description (Continued)
1.2 PIN DESCRIPTION
Symbol
Pin(s)
Type
Description
V
DD
20, 39,
52, 53,
69, 83,
100
IN
3.3V Power Supply
V
SS
11, 30,
48, 60,
75, 90
IN
Ground
PCI BUS INTERFACE SIGNALS (51)
AD[31:0]
92–99,
3–10,
21–28,
31–38
I/O
PCI Address/Data Bus.
A time-multiplexed
address data bus.
C/BE[3:0]
1, 12,
19, 29
I/O
PCI Command/Byte
Enable. Defines the type
of AD bus transaction
type.
FRAME
13
I/O
Cycle Frame. A PCI
transaction begins and
ends with the FRAME
signal.
IRDY
14
I/O
Initiator Ready. An active
low indicates the cycle
initiator is ready to send
or receive data.
TRDY
15
I/O
Target Ready. An active
low indicates that the
target is read to complete
the current transaction.
DEVSEL
16
I/O
Device Select. An active
low indicates the target
has decoded its address.
STOP
17
I/O
STOP. An active low
indicates the target wants
the initiator to stop data
during the current data
phase.
PAR
18
I/O
Parity. Generates an
even parity for the
AD[31.0].
RST
86
IN
Reset. A low active signal
which resets the PCI
device.
INT
84
OUT
Interrupt. An active low
signals in interrupt to the
CPU.
PCICLK
87
IN
Clock. The clock that
drives the PCI timing.
GNT
88
IN
Grant. An active low
signals the master has
access to the PCI bus.
REQ
89
OUT
Request. An active low
indicates the master
wants access to the PCI
bus.
Symbol
Pin(s)
Type
Description
PCI BUS INTERFACE SIGNALS (51)
CLKRUN
85
I/O
Clock Run. An active low
signal used for power
management on
motherboards only. It is
not assigned a pin on the
PCI connector.
PME
91
OUT
Power Management
Event. An active low
signal used for power
management for add in
cards or motherboards. It
is assigned a pin on the
PCI connector.
TC
78
IN
Terminal Count. This
input is asserted by the
DMA controller to indicate
the end of a DMA
transfer. The signal is
only effective during a
DMA access cycle.
IDSEL
2
IN
Initialization Device
Select. An active high
allows reads to the PCI
devices configuration
registers.
MPU-401 INTERFACE SIGNALS (2)
MIDIOUT
50
OUT
MIDI Data Out. Sends
midi data to the midi
connector.
MIDIIN
49
IN
MIDI Data In. Receives
midi data from an
optocoupler.
AC97 CODEC INTERFACE SIGNALS (6)
ACRST
57
OUT
AC97 Master Reset. An
active low which resets
the internal circuitry of
AC97 codecs.
ACCLK
55
IN
AC97 Bit Clock. A
12.288 MHz clock from
the codec. This is used to
synchronize the data
streams to and from the
codecs.
ACSYNC
56
I/O
AC97 Sync. Used to start
the data frame used to
format the serial data to
and from the codecs.
ACDI1
58
IN
Primary CODEC Serial
Data Input. This receives
serial data in from the
primary codec.
ACDI2
59
IN
Secondary CODEC
Serial Data Input. This
receives serial data in
from the secondary
codec.
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