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MC14012BDR2G bảng dữ liệu(PDF) 4 Page - ON Semiconductor |
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MC14012BDR2G bảng dữ liệu(HTML) 4 Page - ON Semiconductor |
4 / 7 page MC14012B http://onsemi.com 4 SWITCHING CHARACTERISTICS (Note 5) (CL = 50 pF, TA = 25_C) Characteristic Symbol VDD Vdc Min Typ (Note 6) Max Unit Output Rise Time tTLH = (1.35 ns/pF) CL + 33 ns tTLH = (0.60 ns/pF) CL + 20 ns tTLH = (0.40 ns/PF) CL + 20 ns tTLH 5.0 10 15 − − − 100 50 40 200 100 80 ns Output Fall Time tTHL = (1.35 ns/pF) CL + 33 ns tTHL = (0.60 ns/pF) CL + 20 ns tTHL = (0.40 ns/pF) CL + 20 ns tTHL 5.0 10 15 − − − 100 50 40 200 100 80 ns Propagation Delay Time tPLH, tPHL = (0.90 ns/pF) CL + 115 ns tPLH, tPHL = (0.36 ns/pF) CL + 47 ns tPLH, tPHL = (0.26 ns/pF) CL + 37 ns tPLH, tPHL 5.0 10 15 − − − 160 65 50 300 130 100 ns 5. The formulas given are for the typical characteristics only at 25 _C. 6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. VDD 14 CL VSS 7 PULSE GENERATOR INPUT OUTPUT 90% 50% 10% 10% 50% 90% 20 ns 20 ns tPHL tPLH tTLH tTHL VOL VOH 0 V VDD INPUT OUTPUT INVERTING *All unused inputs of AND, NAND gates must be connected to VDD. All unused inputs of OR, NOR gates must be connected to VSS. 90% 50% 10% VOL VOH OUTPUT NON−INVERTING tTHL tTLH tPLH tPHL * Figure 3. Switching Time Test Circuit and Waveforms 14 * 7 1, 13 VSS VDD *Inverter omitted 2, 9 3, 10 VDD VSS SAME AS ABOVE 4, 11 5, 12 Figure 4. Circuit Schematic − One of Two Gates Shown |
Số phần tương tự - MC14012BDR2G |
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Mô tả tương tự - MC14012BDR2G |
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