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ADS8586S bảng dữ liệu(PDF) 7 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  16-Bit, 200-kSPS, 8-, 6- and 4-Channel, Simultaneous-Sampling ADCs with Bipolar Inputs on a Single Supply
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ADS8586S bảng dữ liệu(HTML) 7 Page - Texas Instruments

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ADS8588S, ADS8586S, ADS8584S
www.ti.com
SBAS642 – DECEMBER 2016
Product Folder Links: ADS8588S ADS8586S ADS8584S
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Pin Functions (continued)
PIN
TYPE
(1)
DESCRIPTION
NAME
NO.
ADS8588S
ADS8586S
ADS8584S
DB14/HBEN
32
32
32
DIO
Multi-function logic input or output pin (see the DB14/HBEN section):
this pin is data output DB14 in parallel interface mode;
this pin is a control input pin for byte selection (high or low) in parallel byte interface
mode
DB15/BYTE SEL
33
33
33
DIO
Multi-function logic input or output pin (see the DB15/BYTE SEL section):
this pin is data output DB15 (MSB) in parallel interface mode;
this pin is an active high control input pin to enable parallel byte interface mode.
DVDD
23
23
23
P
Digital supply pin; decouple with AGND on pin 26.
FRSTDATA
15
15
15
DO
Active high digital output indicating data read back from channel 1 of the devices (see
the FRSTDATA (Output) section)
OS0
3
3
3
DI
Oversampling mode control pin
(see the Oversampling Mode of Operation section)
OS1
4
4
4
DI
Oversampling mode control pin
(see the Oversampling Mode of Operation section)
OS2
5
5
5
DI
Oversampling mode control pin
(see the Oversampling Mode of Operation section)
PAR/SER/BYTE
SEL
6
6
6
DI
Logic input pin to select between parallel, serial, or parallel byte interface mode (see
the Data Read Operation section)
RANGE
8
8
8
DI
Multi-function logic input pin (see the RANGE (Input) section):
when STBY pin is high, this pin selects the input range of the device (±10 V or ±5 V);
when STBY pin is low, this pin selects between the standby and shutdown modes.
RD/SCLK
12
12
12
DI
Multi-function logic input pin (see the RD/SCLK (Input) section):
this pin is an active-low ready input pin in parallel and parallel byte interface;
this pin is a clock input pin in serial interface mode.
REFCAPA
44
44
44
AO
Reference amplifier output pins. This pin must be shorted to REFCAPB and
decoupled to AGND using a low ESR, 10-µF ceramic capacitor.
REFCAPB
45
45
45
AO
Reference amplifier output pins. This pin must be shorted to REFCAPA and
decoupled to AGND using a low ESR, 10-µF ceramic capacitor.
REFGND
43, 46
43, 46
43, 46
P
Reference GND pin. This pin must be shorted to the analog GND plane and
decoupled with REFIN/REFOUT on pin 42 using a 10-µF capacitor.
REFIN/REFOUT
42
42
42
AIO
This pin acts as an internal reference output when REFSEL is high;
this pin functions as input pin for the external reference when REFSEL is low;
decouple with REFGND on pin 43 using a 10-µF capacitor.
REFSEL
34
34
34
DI
Active high logic input to enable the internal reference
(see the REFSEL (Input) section)
REGCAP1
36
36
36
AO
Output pin 1 for the internal voltage regulator; decouple separately to AGND using a
1-µF capacitor.
REGCAP2
39
39
39
AO
Output pin 2 for the internal voltage regulator; decouple separately to AGND using a
1-µF capacitor.
RESET
11
11
11
DI
Active high logic input to reset the device digital logic
(see the RESET (Input) section)
STBY
7
7
7
DI
Active low logic input to enter the device into one of the two power-down modes:
standby or shutdown (see the Power-Down Modes section)


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