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MC74ACT138DG bảng dữ liệu(PDF) 2 Page - ON Semiconductor |
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MC74ACT138DG bảng dữ liệu(HTML) 2 Page - ON Semiconductor |
2 / 10 page MC74AC138, MC74ACT138 www.onsemi.com 2 FUNCTIONAL DESCRIPTION The MC74AC138/74ACT138 high−speed 1−of−8 decoder/demultiplexer accepts three binary weighted inputs (A0, A1, A2) and, when enabled, provides eight mutually exclusive active−LOW outputs (O0−O7). The MC74AC138/74ACT138 features three Enable inputs, two active−LOW (E1, E2) and one active−HIGH (E3). All outputs will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enabled function allows easy parallel expansion of the device to a 1−of−32 (5 lines to 32 lines) decoder with just four MC74AC138/74ACT138 devices and one inverter (See Figure 4). The MC74AC138/74ACT138 can be used as an 8−output demultiplexer by using one of the active LOW Enable inputs as the data input and the other Enable inputs as strobes. The Enable inputs which are not used must be permanently tied to their appropriate active−HIGH or active−LOW state. TRUTH TABLE Inputs Outputs E1 E2 E3 A0 A1 A2 O0 O1 O2 O3 O4 O5 O6 O7 H X X X X X H H H H H H H H X H X X X X H H H H H H H H X X L X X X H H H H H H H H L L H L L L L H H H H H H H L L H H L L H L H H H H H H L L H L H L H H L H H H H H L L H H H L H H H L H H H H L L H L L H H H H H L H H H L L H H L H H H H H H L H H L L H L H H H H H H H H L H L L H H H H H H H H H H H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial A2 A1 A0 E3 E1 E2 07 06 05 04 03 02 01 00 NOTE: This diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Figure 3. Logic Diagram |
Số phần tương tự - MC74ACT138DG |
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