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Giải thích chi tiết về linh kiện  Octal 3-State Noninverting D Flip-Flop with LSTTL-Compatible Inputs
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MC74HCT374A
http://onsemi.com
2
Design Criteria
Value
Units
Internal Gate Count*
69
ea.
Internal Gate Propagation Delay
1.5
ns
Internal Gate Power Dissipation
5.0
mW
Speed Power Product
.0075
pJ
*Equivalent to a two−input NAND gate.
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
–0.5 to +7.0
V
Vin
DC Input Voltage (Referenced to GND)
–0.5 to VCC + 0.5
V
Vout
DC Output Voltage (Referenced to GND)
–0.5 to VCC + 0.5
V
Iin
DC Input Current, per Pin
±20
mA
Iout
DC Output Current, per Pin
±35
mA
ICC
DC Supply Current, VCC and GND Pins
±75
mA
PD
Power Dissipation in Still Air,
SOIC Package†
TSSOP Package†
500
450
mW
Tstg
Storage Temperature
–65 to +150
_C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
(SOIC or TSSOP Package)
260
_C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of
these limits are exceeded, device functionality should not be assumed, damage may occur and
reliability may be affected.
†Derating: SOIC Package: –7 mW/
_C from 65_ to 125_C
TSSOP Package: −6.1 mW/
_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage (Referenced to GND)
4.5
5.5
V
Vin, Vout
DC Input Voltage, Output Voltage (Referenced to GND)
0
VCC
V
TA
Operating Temperature, All Package Types
–55
+125
_C
tr, tf
Input Rise and Fall Time (Figure 1)
0
500
ns
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND
v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.


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