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Giải thích chi tiết về linh kiện  Octal 3-State Noninverting D Flip-Flop with LSTTL-Compatible Inputs
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DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
Test Conditions
VCC
V
Guaranteed Limit
Unit
−55 to
25
_C
≤ 85_C
≤ 125_C
VIH
Minimum High−Level Input Voltage
Vout = 0.1 V or VCC – 0.1 V
|Iout| ≤ 20 mA
4.5
5.5
2.0
2.0
2.0
2.0
2.0
2.0
V
VIL
Maximum Low−Level Input Voltage
Vout = 0.1 V or VCC – 0.1 V
|Iout| ≤ 20 mA
4.5
5.5
0.8
0.8
0.8
0.8
0.8
0.8
V
VOH
Minimum High−Level Output Voltage
Vin = VIH or VIL
|Iout| ≤ 20 mA
4.5
5.5
4.4
5.4
4.4
5.4
4.4
5.4
V
Vin = VIH or VIL
|Iout| ≤ 6.0 mA
4.5
3.98
3.84
3.7
VOL
Maximum Low−Level Output Voltage
Vin = VIH or VIL
|Iout| ≤ 20 mA
4.5
5.5
0.1
0.1
0.1
0.1
0.1
0.1
V
Vin = VIH or VIL
|Iout| ≤ 6.0 mA
4.5
0.26
0.33
0.4
Iin
Maximum Input Leakage Current
Vin = VCC or GND
5.5
±0.1
±1.0
±1.0
mA
IOZ
Maximum Three−State Leakage
Current
Output in High−Impedance State
Vin = VIL or VIH
Vout = VCC or GND
5.5
±0.5
±5.0
±10
mA
ICC
Maximum Quiescent Supply Current
(per Package)
Vin = VCC or GND
Iout = 0 mA
5.5
4.0
40
160
mA
DICC
Additional Quiescent Supply Current
Vin = 2.4 V, Any One Input
Vin = VCC or GND, Other Inputs
lout = 0 mA
5.5
≥ −55_C
25
_C to 125_C
mA
2.9
2.4
1. Total Supply Current = ICC + ΣDICC.
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±10%, CL = 50 pF, Input tr = tf = 6.0 ns)
Symbol
Parameter
Guaranteed Limit
Unit
−55 to 25
_C
≤ 85_C
≤ 125_C
fmax
Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 4)
30
24
20
MHz
tPLH,
tPHL
Maximum Propagation Delay, Clock to Q
(Figures 1 and 4)
31
39
47
ns
tPLZ,
tPHZ
Maximum Propagation Delay, Output Enable to Q
(Figures 2 and 5)
30
38
45
ns
tPZL,
tPZH
Maximum Propagation Delay, Output Enable to Q
(Figures 2 and 5)
30
38
45
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 4)
12
15
18
ns
Cin
Maximum Input Capacitance
10
10
10
pF
Cout
Maximum Three−State Output Capacitance
(Output in High−Impedance State)
15
15
15
pF
Typical @ 25
°C, VCC = 5.0 V
CPD
Power Dissipation Capacitance (Per Flip−Flop)*
65
pF
* Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC.


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