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6V49205BPAGI bảng dữ liệu(PDF) 7 Page - Integrated Device Technology

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Giải thích chi tiết về linh kiện  Freescale System Clock w/Selectable DDR Frequency
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REVISION R 11/23/16
7
FREESCALE P10XX AND P20XX SYSTEM CLOCK W/SELECTABLE DDR FREQUENCY
6V49205B DATASHEET
Electrical Characteristics - DDR Clock
Electrical Characteristics - Sys_CCB
Electrical Characteristics - 125M
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
fDDR66.66
SEL100#_66 = 1, VT = OVDD/2 V
MHz
2,3,6
fDDR100
SEL100#_66 = 0, VT = OVDD/2 V
MHz
2,3,6
ppmSSoff
Spread off
ppm
1,2,5
ppmSSon
Spread on
ppm
1,2,5
Output High Voltage
VOH
VOH at the selected operating frequency
2.4
V
1
Output Low Voltage
VOL
VOL at the selected operating frequency
0.4
V
1
tSLEW00
'00' = Hi-Z
V/ns
tSLEW01
'01' Slow Slew Rate (Averaging on)
1.1
1.6
2.3
V/ns
1,3,8
tSLEW10
'10' Fast Slew Rate (Averaging on)
1.6
2.3
3.2
V/ns
1,3,8
tSLEW11
'11' Fastest Slew Rate (Averaging on)
1.8
2.7
3.7
V/ns
1,3,8
Duty Cycle
dt1
VT = OVDD/2 V
40
51.4
60
%
1,6
Jitter, Peak period jitter
tjpeak
VT = OVDD/2 V
±96
±150
ps
1,6
Phase Noise
tphasenoise
-56dBc
10
500
kHz
1,7
AC Input Swing Limits @ 3.3V
OVDD
VAC
This is the difference between VOL and
VOH at the selected operating frequency.
1.9
3.4
V
1
Spread Spectrum Modulation
Frequency
fSSMOD
Triangular Modulation
30
32.3
60
kHz
Slew Rate
VDDO = 3.3V
Hi-Z
DDR Clock Frequency
66.666
100.00
Synthesis error
0
+/-150
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
FS(1:0) = 00, VT = OVDD/2 V
MHz
2,3,6
FS(1:0) = 01, VT = OVDD/2 V
MHz
2,3,6
FS(1:0) = 10, VT = OVDD/2 V
MHz
2,3,6
FS(1:0) = 11, VT = OVDD/2 V
MHz
2,3,6
ppmSSoff
Spread off
ppm
1,2,5
ppmSSon
Spread on
ppm
1,2,5
Output High Voltage
VOH
VOH at the selected operating frequency
2.4
V
1
Output Low Voltage
VOL
VOL at the selected operating frequency
0.4
V
1
tSLEW00
'00' = Hi-Z
V/ns
tSLEW01
'01' Slow Slew Rate (Averaging on)
0.8
1.4
2.1
V/ns
1,3,8
tSLEW10
'10' Fast Slew Rate (Averaging on)
0.9
1.6
2.5
V/ns
1,3,8
tSLEW11
'11' Fastest Slew Rate (Averaging on)
1.1
1.9
3.1
V/ns
1,3,8
Duty Cycle
dt1
VT = OVDD/2 V
40
51.4
60
%
1,6
Jitter, Peak period jitter
tjpeak
VT = OVDD/2 V, SSC < 0.75%
±116
±150
ps
1
Phase Noise
tphasenoise
-56dBc
10
500
kHz
1,7
AC Input Swing Limits @ 3.3V
OVDD
VAC
This is the difference between VOL and
VOH at the selected operating frequency.
1.9
V
1
Spread Spectrum Modulation
Frequency
fSSMOD
Triangular Modulation
0
31.5
60
kHz
Hi-Z
Slew Rate
VDDO = 3.3V
83.333
Synthesis error
0
+/-150
Clock Frequency
fSys_CCB
66.666
100.00
80.00
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
Clock frequency
f125M
VT = OVDD/2 V
ns
2,3,6
Synthesis error
ppm
ppm
1,2,5
Output High Voltage
VOH
VOH at the selected operating frequency
2.2
V
1
Output Low Voltage
VOL
VOL at the selected operating frequency
0.5
V
1
Rise/Fall time
VDDO = 3.3V
tRF125M3.3V
Measured between 0.6V and 2.7V
0.7
1
ns
1,3
Duty Cycle
dt1
VT = OVDD/2 V
47
52
53
%
1
Jitter, Peak period jitter
tjpeak
VT = OVDD/2 V
±150
ps
1
0
125.00


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