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BU21024FV-M bảng dữ liệu(PDF) 7 Page - Rohm

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BU21024FV-M bảng dữ liệu(HTML) 7 Page - Rohm

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BU21023GUL
BU21023MUV
BU21024FV-M
7/16
Datasheet
Datasheet
TSZ02201-0L5L0F300190-1-2
© 2014 ROHM Co., Ltd. All rights reserved.
31.Mar.2014 Rev.003
www.rohm.com
TSZ22111・15・001
BU21024FV-M
HOST-I/F mode (2-wire serial)
(SCL=SCL_SCK, SDA=SDA_SI)
The 2-wire serial mode presents an I
2C interface for all practical purposes, but it is not a complete implementation
conforming to the I
2C specification. BU21024FV-M devices can co-exist with other I2C devices on the same bus. The slave
address for 2-wire serial communication is 5Ch or 5Dh. This is determined by the SEL_CSB pin.
SEL_CSB = “L”
: Slave address = 5Ch
SEL_CSB = “H”
: Slave address = 5Dh
Parameter
Symbol
Limit
Unit
Conditions
Min
Typ
Max
SCL Clock Frequency
fSCL
0
-
400
kHz
START Condition Hold Time
tHD:STA
0.6
-
-
µs
SCL “L”
tLOW
1.3
-
-
µs
SCL “H”
tHIGH
0.6
-
-
µs
Data Hold Time
tHD:DAT
0.1
-
-
µs
Data Setup Time
tSU:DAT
0.1
-
-
µs
STOP Condition Setup Time
tSU:STO
0.6
-
-
µs
S
SLAVE ADDRESS W
A REGISTER ADDRESS A
A P
7bit = 5Ch or 5Dh
8bit
S
SLAVE ADDRESS W
A REGISTER ADDRESS A
S
R A
READ DATA
N P
7bit = 5Ch or 5Dh
8bit
8bit
S
P
R
W
A
N
= acknowledge (SDA LOW)
= not acknowledge (SDA HIGH)
from Slave to Master
= STOP condition
= data direction READ (SDA HIGH)
= data direction WRITE (SDA LOW)
SLAVE ADDRESS
7bit = 5Ch or 5Dh
from Master to Slave
= START condition
・Write protocol
WRITE DATA
・Read protocol
SDA
SCL
Address
ACK
ACK
ACK
Data
Data
tHD;STA
tSU;STO
tSU;DAT
tHD;DAT
SDA
SCL


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