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TP2640N3-GP013 bảng dữ liệu(PDF) 1 Page - Supertex, Inc

tên linh kiện TP2640N3-GP013
Giải thích chi tiết về linh kiện  P-Channel Enhancement-Mode Vertical DMOS FET
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nhà sản xuất  SUTEX [Supertex, Inc]
Trang chủ  http://www.supertex.com
Logo SUTEX - Supertex, Inc

TP2640N3-GP013 bảng dữ liệu(HTML) 1 Page - Supertex, Inc

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Supertex inc.
Supertex inc.
www.supertex.com
Doc.# DSFP-TP2640
B081613
TP2640
Product Marking
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
SiTP
2640
YYWW
TO-92
YY = Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging
YYWW
P2640
LLLL
8-Lead SOIC
DRAIN
DRAIN
DRAIN
DRAIN
GATE
SOURCE
N/C
N/C
Package may or may not include the following marks: Si or
Package may or may not include the following marks: Si or
Features
Low threshold (-2.0V max.)
High input impedance
Low input capacitance
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Applications
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
General Description
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input impedance
and positive temperature coefficient inherent in MOS devices.
Characteristic of all MOS structures, this device is free
from thermal runaway and thermally-induced secondary
breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
P-Channel Enhancement-Mode
Vertical DMOS FET
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
BV
DSS
Drain-to-gate voltage
BV
DGS
Gate-to-source voltage
±20V
Operating and storage temperature
-55OC to +150OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
Pin Configuration
TO-92
GATE
SOURCE
DRAIN
Ordering Information
Part Number
Package
Option
Packing
TP2640LG-G
8-Lead SOIC
2500/Reel
TP2640N3-G
3-Lead TO-92
1000/Bag
TP2640N3-G P002
3-Lead TO-92
2000/Reel
TP2640N3-G P003
TP2640N3-G P005
TP2640N3-G P013
TP2640N3-G P014
Product Summary
BV
DSS/BVDGS
R
DS(ON)
(max)
I
D(ON)
(min)
V
GS(th)
(max)
-400V
15Ω
-2.0A
-0.7V
-G denotes a lead (Pb)-free / RoHS compliant package.
Contact factory for Wafer / Die availablity.
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.
Typical Thermal Resistance
Package
θ
ja
8-Lead SOIC
101OC/W
TO-92
132OC/W
8-Lead SOIC


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