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ADM1066ACP-REEL bảng dữ liệu(PDF) 5 Page - Analog Devices

tên linh kiện ADM1066ACP-REEL
Giải thích chi tiết về linh kiện  Multisupply Supervisor/Sequencer with Margining Control and Auxiliary ADC Inputs
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ADM1066ACP-REEL bảng dữ liệu(HTML) 5 Page - Analog Devices

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ADM1066
Rev. 0 | Page 5 of 32
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
Conversion Time
0.44
ms
One conversion on one channel
84
ms
All 12 channels selected, 16x averaging enabled
Offset Error
±2
LSB
VREFIN = 2.048 V
Input Noise
0.25
LSBrms
Direct input (no attenuator)
BUFFERED VOLTAGE OUTPUT DACs
Resolution
8
Bits
Code 0x80 Output Voltage
6 DACs are individually selectable for centering on
one of four output voltage ranges
Range 1
0.592
0.6
0.603
V
Range 2
0.796
0.8
0.803
V
Range 3
0.996
1
1.003
V
Range 4
1.246
1.25
1.253
V
Output Voltage Range
601.25
mV
Same range, independent of center point
LSB Step Size
2.36
mV
INL
±0.75
LSB
Endpoint corrected
DNL
±0.4
LSB
Gain Error
1
%
Load Regulation
-4
mV
Sourcing Current, IREFOUTMA X= -200µA
2
mV
Sinking Current, IREFOUTMA X= 100µA
Maximum Load Capacitance
50
pF
Settling Time into 50 pF Load
2
µs
Load Regulation
2.5
mV
Per mA
PSRR
60
dB
DC
40
dB
100 mV step in 20 ns with 50 pF load
REFERENCE OUTPUT
Reference Output Voltage
2.043
2.048
2.053
V
No load
Load Regulation
−0.25
mV
Sourcing current, IDACnMAX = −100 µA
0.25
mV
Sinking current, IDACnMAX = 100 µA
Minimum Load Capacitance
1
µF
Capacitor required for decoupling, stability
Load Regulation
2
mV
Per 100 µA
PSRR
60
dB
DC
PROGRAMMABLE DRIVER OUTPUTS
High Voltage (Charge Pump) Mode (PDO1–6)
Output Impedance
500
kΩ
VOH
11
12.5
14
V
IOH = 0
10.5
12
13.5
V
IOH = 1µA
IOUTAVG
20
µA
2 V < VOH < 7 V
Standard (Digital Output) Mode (PDO1–10)
VOH
2.4
V
VPU (pull-up to VDDCAP or VPN) = 2.7 V, IOH = 0.5 mA
4.5
V
VPU to Vpn = 6.0 V, IOH = 0 mA
VPU − 0.3
V
VPU ≤ 2.7 V, IOH = 0.5 mA
VOL
0
0.50
V
IOL = 20 mA
IOL2
20
mA
Maximum sink current per PDO pin
ISINK2
60
mA
Maximum total sink for all PDOs
RPULL-UP
20
kΩ
Internal pull-up
ISOURCE (VPn)2
2
mA
Current load on any VPn pull-ups, that is, total
source current available through any number of
PDO pull-up switches configured onto any one
Three-State Output Leakage Current
10
µA
VPDO = 14.4 V
Oscillator Frequency
90
100
110
kHz
All on-chip time delays derived from this clock


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