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ST16C650ACP40 bảng dữ liệu(PDF) 6 Page - Exar Corporation

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Giải thích chi tiết về linh kiện  2.90V TO 5.5V UART WITH 32-BYTE FIFO
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ST16C650A
áç
áç
áç
áç
2.90V TO 5.5V UART WITH 32-BYTE FIFO
REV. 5.0.0
6
Pin type: I=Input, O=Output, IO= Input/output, OD=Output Open Drain.
CD#
384240
I
Carrier Detect input or general purpose input (active low)
RI#
394341
I
Ring Indicator input or general purpose input (active low)
ANCILLARY SIGNALS
XTAL1
16
18
14
I
Crystal or external clock input. Caution: this input is not 5V tolerant.
XTAL2
17
19
15
O
Crystal or buffered clock output
RCLK
9
10
5
I
Receiver Clock
This input is used as external 16X clock input to the receiver section. Con-
nect the BAUDOUT# pin to this input externally.
BAUDOUT#
15
17
12
O
Baud Rate Generator Output (active low)
This pin provides the 16X clock of the selected data rate from the baud
rate generator. The RCLK pin must be connected externally to BAUD-
OUT# when the receiver is operating at the same data rate.
When the PC mode is selected, the baud rate generator clock output is
internally connected to the RCLK input. This pin then functions as the
LPT-1 printer port decode logic output, see
Table 3.
SEL
-
34
36
I
PC Mode Select (active low)
When this input is at logic 0, it enables the on-board chip select decode
function according to PC ISA bus COM[4:1] and IRQ[4:3] port definitions.
See
Table 3 for details. This pin has an internal 100k
Ω pull-up resistor.
DDIS#
23
26
22
O
Drive Disable Output
This pin goes to a logic 0 whenever the host CPU is reading data from the
650A. It can control the direction of a data bus transceiver between the
CPU and 650A or other logic functions.
RESET
35
39
35
I
Reset Input (active high)
A 40 ns minimum active pulse on this pin will reset the internal registers
and all outputs. The UART transmitter output will be held at logic 1, the
receiver input will be ignored and outputs are reset. See UART Reset
Conditions in
Table 13.
OP1#
34
38
34
O
Output Port 1
General purpose output.
OP2#
31
35
31
O
Output Port 2
General purpose output.
VCC
404442
Pwr
2.90V to 5.5V supply voltage
All inputs are 5V tolerant except for XTAL for devices with date code top
mark of "HC YYWW" and newer. Devices with date code top mark of "GC
YYWW" and older do not have 5V tolerant inputs.
GND
202218
Pwr
Power supply common ground
NC
-
-
1, 13,
25
-
No Connect
NAME
40-
PDIP
PIN #
44-
PLCC
PIN #
48-
TQFP
PIN #
TYPE
DESCRIPTION


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