Electrical Characteristics LM1881–X

V

Ω;T

Parameter

Conditions

Min

Typ

Max

Units

Supply Current

Outputs at

Logic 1

V

V

5.2

5.5

10

12

mA

DC Input Voltage

Pin 2

1.3

1.5

1.8

V

Input Threshold Voltage

55

70

85

mV

Input Discharge Current

Pin 2; V

6

11

16

µA

Input Clamp Charge Current

Pin 2; V

0.2

0.8

mA

R

Pin 6;

1.10

1.22

1.35

V

Composite Sync. & Vertical

Outputs

I

Logic 1

V

V

4.0

11.0

4.5

V

I

Logic 1

V

V

2.4

10.0

3.6

V

Burst Gate & Odd/Even

Outputs

I

Logic 1

V

V

4.0

11.0

4.5

V

Composite Sync. Output

I

0.2

0.8

V

Vertical Sync. Output

I

0.2

0.8

V

Burst Gate Output

I

0.2

0.8

V

Odd/Even Output

I

0.2

0.8

V

Vertical Sync Width

140

230

588

µs

Burst Gate Width

2.7 k

Ω from Pin 5 to V

CC

2.2

4

4.7

µs

Vertical Default Time

32

65

90

µs

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. For guaranteed specifications and test conditions, see the

Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.

Note 2: For operation in ambient temperatures above 25˚C, the device must be derated based on a 150˚C maximum junction temperature and a package thermal

resistance of 110˚C/W, junction to ambient.

Note 3: ESD susceptibility test uses the “human body model, 100 pF discharged through a 1.5 k

Ω resistor”.

Note 5: Relative difference between the input clamp voltage and the minimum input voltage which produces a horizontal output pulse.

Note 7: Delay time between the start of vertical sync (at input) and the vertical output pulse.

Typical Performance Characteristics

R

vs Vertical Serration

Pulse Separation

Vertical Default

Sync Delay Time

vs R

SET

00915007

00915008

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