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MC100LVEL14DWG bảng dữ liệu(PDF) 4 Page - ON Semiconductor

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Giải thích chi tiết về linh kiện  3.3 V ECL 1:5 Clock Distribution Chip
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Table 5. AC CHARACTERISTICS (VCC = 3.3 V; VEE = 0.0 V or VCC = 0.0 V; VEE = −3.3 V (Note 1)
Symbol
Characteristic
−40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fmax
Maximum Toggle Frequency (Figure 2)
> 1
> 1
> 1
GHz
tPLH
tPHL
Prop
CLK to Q (Diff)
Delay
CLK to Q (SE)
SCLK to Q
520
470
470
720
770
770
580
530
530
680
680
680
780
830
830
630
580
580
830
880
880
ps
tSKEW
Part-to-Part Skew
Within-Device Skew (Note 2)
200
50
200
50
200
50
ps
tJITTER
Random Clock Jitter (RMS) @ 1 Ghz
(Figure 2)
0.2
< 1
0.2
< 1
0.2
< 1
ps
tS
Setup Time EN
0
−95
0
−110
0
−125
ps
tH
Hold Time EN
250
150
250
160
250
175
ps
VPP
Input Swing CLK (Note 3)
150
1000
150
1000
150
1000
mV
tr
tf
Output Rise/Fall Times Q (20%−80%)
230
500
230
500
230
500
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
1. VEE can vary ±0.3 V.
2. Skews are specified for identical LOW-to-HIGH or HIGH-to-LOW transitions.
3. VPP(min) is minimum input swing for which AC parameters guaranteed.
0
100
200
300
400
500
600
700
800
900
0
300
600
900
1200
1500
1800
2100
2400
Figure 2. Fmax/Jitter
FREQUENCY (MHz)
1
2
3
4
5
6
7
8
(JITTER)
9


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