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MC100LVEL31 bảng dữ liệu(PDF) 2 Page - ON Semiconductor |
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MC100LVEL31 bảng dữ liệu(HTML) 2 Page - ON Semiconductor |
2 / 6 page MC100LVEL31 www.onsemi.com 2 Figure 1. Logic Diagram and Pinout Assignment 1 2 3 45 6 7 8 Q VEE VCC D Q CLK R D S Flip Flop R S PIN FUNCTION Table 1. PIN DESCRIPTION D L H X X X Table 2. TRUTH TABLE S L L H L H R L L L H H CLK Z Z X X X Q L H H L Undef Z = LOW to HIGH Transition X = Don’t Care Q H L L H Undef CLK ECL Clock Input Q, Q ECL Differential Data Outputs D ECL Data Input R ECL Reset Input S ECL Set Input VCC Positive Supply VEE Negative Supply Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit VCC PECL Mode Power Supply VEE = 0 V 8 to 0 V VEE NECL Mode Power Supply VCC = 0 V −8 to 0 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V VI ≤ VCC VI ≥ VEE 6 to 0 −6 to 0 V Iout Output Current Continuous Surge 50 100 mA TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm SOIC−8 NB SOIC−8 NB 190 130 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board SOIC−8 NB 41 to 44 ±5% °C/W qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm TSSOP−8 TSSOP−8 185 140 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board TSSOP−8 41 to 44 ±5% °C/W Tsol Wave Solder (Pb-Free) < 2 to 3 sec @ 260°C 265 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. |
Số phần tương tự - MC100LVEL31_16 |
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Mô tả tương tự - MC100LVEL31_16 |
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