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MC100EP16VCDTR2G bảng dữ liệu(PDF) 5 Page - ON Semiconductor

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Giải thích chi tiết về linh kiện  3.3 V / 5 V ECL Differential Receiver/Driver
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Table 7. AC CHARACTERISTICS (VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 1))
−40°C
25°C
85°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
fmax
Maximum Frequency (Figure 2)
> 3
> 3
> 3
GHz
tPLH,
tPHL
Propagation Delay
(Differential) Q
(Differential) QHG, QHG
(Single-Ended) Q
(Single-Ended) QHG, QHG
200
250
250
300
280
360
330
410
350
450
400
500
250
300
300
350
310
380
360
430
400
500
450
550
275
325
325
375
340
430
390
480
425
525
475
575
ps
tS
Setup Time
EN = L to D
EN =H to D
50
100
15
60
50
100
5
40
50
100
18
10
ps
tH
Hold Time
EN = L to D
EN =H to D
100
50
50
15
100
50
40
20
100
50
5
20
ps
tSKEW
Duty Cycle Skew (Note 2)
5.0
20
5.0
20
5.0
20
ps
tJITTER
RMS Random Clock Jitter (Figure 2)
0.2
< 1
0.2
< 1
0.2
< 1
ps
VPP
Input Voltage Swing
HG
(Differential Configuration)
Q
25
150
800
800
1200
1200
25
150
800
800
1200
1200
25
150
800
800
1200
1200
mV
tr
tf
Output Rise/Fall Times
Q
(20% − 80%)
QHG, QHG
200
70
300
130
400
220
250
80
350
150
450
240
250
100
350
170
500
270
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.
2. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays
are measured from the cross point of the inputs to the cross point of the outputs.
0
100
200
300
400
500
600
700
800
900
0
500
1000
1500
2000
2500
3000
3500
4000
Figure 2. Fmax/Jitter for QHG, QHG Output
FREQUENCY (MHz)
1
2
3
4
5
6
7
8
9


Số phần tương tự - MC100EP16VCDTR2G

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ON Semiconductor		 MC100EP16VCDTR2G ONSEMI-MC100EP16VCDTR2G Datasheet
156Kb / 11P		    3.3V / 5V ECL Differential Receiver/Driver with High Gain and Enable Output
December, 2006 ??Rev. 5
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Mô tả tương tự - MC100EP16VCDTR2G

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