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LM1290 bảng dữ liệu(PDF) 7 Page - National Semiconductor (TI) |
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LM1290 bảng dữ liệu(HTML) 7 Page - National Semiconductor (TI) |
7 / 9 page Application Hints 1. Phase Control for Geometry Correction: Pin 10 (PHASE) is designed to control static phase (picture horizontal position) as well as dynamic phase for geom- etry correction. Complete control of static and dynamic phase can be achieved by superposing a correction waveform (Sawtooth and/or parabola) on the DC control voltage at pin 10 (see Figure 12). 2. Programmable Frequency Ramping: H frequency transitions from high to low present a special problem for deflection output stages without current limiting. If, dur- ing such a transition, the output transistor on-time in- creases excessively before the B+ voltage has de- creased to its final level, then the deflection inductor current ramps too high and the induced flyback pulse can exceed the breakdown voltage, BV CEX, of the output transistor. To prevent this, the rate of change of the VCO frequency must be limited. Consider a scanning mode transition at t = 0 from f 1 to f2. The VCO frequency as a function of time, f VCO(t), is de- scribed by the equation, fVCO(t) ≅ f 1 +(f 2 − f 1) (1 – exp (−t /τ)), where τ = 40x103 xC FVC. The above equation can be used to predict VCO behav- ior during frequency transitions, but in practice the value of C FVC is most easily determined empirically. In general, large values minimize the chance of exceeding BV CEX, but generate long PLL capture times. 3. Phase Voltage Range vs Delay Time: The recom- mended phase voltage range to use on pin 10 (PHASE) depends on the delay time of the deflection output stage. Delay time is defined as the time from the rising edge of H Drive to the center of flyback. For best performance the phase voltage range should be in the unshaded area of Figure 11. Recommended Phase Voltage for 640 x 480 @ 60 Hz DS012917-11 FIGURE 11. www.national.com 7 |
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Mô tả tương tự - LM1290 |
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